counter4x5.fit.eqn

完成的是RS422信号的计数功能

F1_CntTe[17]_p2_out = JI2 & !F1L66 & !F1_CntTe[17] & F1_CntTe[16] & F1_CntTe[14] & F1_CntTe[15] & F1_CntTe[12] & F1_CntTe[13] & F1_CntTe[10] & F1_CntTe[11] & F1_CntTe[8] & F1_CntTe[9] & F1_CntTe[6] & F1_CntTe[7] & F1_CntTe[4] & F1_CntTe[5] & F1_CntTe[2] & F1_CntTe[3] & F1_CntTe[0] & F1_CntTe[1];
F1_CntTe[17]_p4_out = JI2 & F1L66 & F1_CntTe[17] & F1L83;
F1_CntTe[17]_or_out = F1_CntTe[17]_p0_out # F1_CntTe[17]_p1_out # F1_CntTe[17]_p2_out # F1_CntTe[17]_p4_out;
F1_CntTe[17]_reg_input = F1_CntTe[17]_or_out;
F1_CntTe[17]_p3_out = F1L67 & F1L77;
F1_CntTe[17] = DFFE(F1_CntTe[17]_reg_input, GLOBAL(Clock), , , F1_CntTe[17]_p3_out);


--F1L04 is Decoder:inst9|CntTe~5239 at SEXP5
F1L04 = EXP(!F1_CntTe[17] & !F1_CntTe[16] & !F1_CntTe[14] & !F1_CntTe[15] & !F1_CntTe[12] & !F1_CntTe[13] & !F1_CntTe[10] & !F1_CntTe[11] & !F1_CntTe[8] & !F1_CntTe[9] & !F1_CntTe[6] & !F1_CntTe[7] & !F1_CntTe[4] & !F1_CntTe[5] & !F1_CntTe[2] & !F1_CntTe[3] & !F1_CntTe[0] & !F1_CntTe[1]);


--F1L14 is Decoder:inst9|CntTe~5240 at SEXP9
F1L14 = EXP(F1_CntTe[17] & F1_CntTe[16] & F1_CntTe[14] & F1_CntTe[15] & F1_CntTe[12] & F1_CntTe[13] & F1_CntTe[10] & F1_CntTe[11] & F1_CntTe[8] & F1_CntTe[9] & F1_CntTe[6] & F1_CntTe[7] & F1_CntTe[4] & F1_CntTe[5] & F1_CntTe[2] & F1_CntTe[3] & F1_CntTe[0] & F1_CntTe[1]);


--F1_CntTe[18] is Decoder:inst9|CntTe[18] at LC11
F1_CntTe[18]_p0_out = JI2 & !F1L66 & F1_CntTe[18] & F1L14;
F1_CntTe[18]_p1_out = JI2 & F1L66 & !F1_CntTe[18] & !F1_CntTe[17] & !F1_CntTe[16] & !F1_CntTe[14] & !F1_CntTe[15] & !F1_CntTe[12] & !F1_CntTe[13] & !F1_CntTe[10] & !F1_CntTe[11] & !F1_CntTe[8] & !F1_CntTe[9] & !F1_CntTe[6] & !F1_CntTe[7] & !F1_CntTe[4] & !F1_CntTe[5] & !F1_CntTe[2] & !F1_CntTe[3] & !F1_CntTe[0] & !F1_CntTe[1];
F1_CntTe[18]_p2_out = JI2 & !F1L66 & !F1_CntTe[18] & F1_CntTe[17] & F1_CntTe[16] & F1_CntTe[14] & F1_CntTe[15] & F1_CntTe[12] & F1_CntTe[13] & F1_CntTe[10] & F1_CntTe[11] & F1_CntTe[8] & F1_CntTe[9] & F1_CntTe[6] & F1_CntTe[7] & F1_CntTe[4] & F1_CntTe[5] & F1_CntTe[2] & F1_CntTe[3] & F1_CntTe[0] & F1_CntTe[1];
F1_CntTe[18]_p4_out = JI2 & F1L66 & F1_CntTe[18] & F1L04;
F1_CntTe[18]_or_out = F1_CntTe[18]_p0_out # F1_CntTe[18]_p1_out # F1_CntTe[18]_p2_out # F1_CntTe[18]_p4_out;
F1_CntTe[18]_reg_input = F1_CntTe[18]_or_out;
F1_CntTe[18]_p3_out = F1L27 & F1L37;
F1_CntTe[18] = DFFE(F1_CntTe[18]_reg_input, GLOBAL(Clock), , , F1_CntTe[18]_p3_out);


--F1L24 is Decoder:inst9|CntTe~5247 at SEXP31
F1L24 = EXP(F1_CntTe[0] & F1_CntTe[3] & F1_CntTe[2] & F1_CntTe[5] & F1_CntTe[4] & F1_CntTe[7] & F1_CntTe[6] & F1_CntTe[9] & F1_CntTe[8] & F1_CntTe[11] & F1_CntTe[10] & F1_CntTe[13] & F1_CntTe[12] & F1_CntTe[15]);


--F1L34 is Decoder:inst9|CntTe~5248 at SEXP32
F1L34 = EXP(!F1_CntTe[0] & !F1_CntTe[3] & !F1_CntTe[2] & !F1_CntTe[5] & !F1_CntTe[4] & !F1_CntTe[7] & !F1_CntTe[6] & !F1_CntTe[9] & !F1_CntTe[8] & !F1_CntTe[11] & !F1_CntTe[10] & !F1_CntTe[13] & !F1_CntTe[12] & !F1_CntTe[15]);


--F1_CntTe[19] is Decoder:inst9|CntTe[19] at LC20
F1_CntTe[19]_p0_out = JI2 & F1_CntTe[19] & !F1_CntTe[1] & F1L34;
F1_CntTe[19]_p1_out = JI2 & !F1L66 & F1_CntTe[19] & !F1_CntTe[18];
F1_CntTe[19]_p2_out = JI2 & !F1L66 & !F1_CntTe[19] & F1_CntTe[18] & F1_CntTe[17] & F1_CntTe[16] & F1_CntTe[14] & F1_CntTe[15] & F1_CntTe[12] & F1_CntTe[13] & F1_CntTe[10] & F1_CntTe[11] & F1_CntTe[8] & F1_CntTe[9] & F1_CntTe[6] & F1_CntTe[7] & F1_CntTe[4] & F1_CntTe[5] & F1_CntTe[2] & F1_CntTe[3] & F1_CntTe[0] & F1_CntTe[1];
F1_CntTe[19]_p4_out = JI2 & F1_CntTe[19] & F1_CntTe[17] & F1L24;
F1_CntTe[19]_or_out = F1L16 # F1_CntTe[19]_p0_out # F1_CntTe[19]_p1_out # F1_CntTe[19]_p2_out # F1_CntTe[19]_p4_out;
F1_CntTe[19]_reg_input = F1_CntTe[19]_or_out;
F1_CntTe[19]_p3_out = F1L67 & F1L77;
F1_CntTe[19] = DFFE(F1_CntTe[19]_reg_input, GLOBAL(Clock), , , F1_CntTe[19]_p3_out);


--F1L44 is Decoder:inst9|CntTe~5255 at SEXP10
F1L44 = EXP(F1_CntTe[0] & F1_CntTe[3] & F1_CntTe[2] & F1_CntTe[5] & F1_CntTe[4] & F1_CntTe[7] & F1_CntTe[6] & F1_CntTe[9] & F1_CntTe[8] & F1_CntTe[11] & F1_CntTe[10] & F1_CntTe[13] & F1_CntTe[12] & F1_CntTe[15] & F1_CntTe[18]);


--F1L54 is Decoder:inst9|CntTe~5256 at SEXP12
F1L54 = EXP(!F1_CntTe[18] & !F1_CntTe[0] & !F1_CntTe[3] & !F1_CntTe[2] & !F1_CntTe[5] & !F1_CntTe[4] & !F1_CntTe[7] & !F1_CntTe[6] & !F1_CntTe[9] & !F1_CntTe[8] & !F1_CntTe[11] & !F1_CntTe[10] & !F1_CntTe[13] & !F1_CntTe[12] & !F1_CntTe[15]);


--F1_CntTe[20] is Decoder:inst9|CntTe[20] at LC2
F1_CntTe[20]_p0_out = JI2 & F1_CntTe[20] & !F1_CntTe[1] & F1L54;
F1_CntTe[20]_p1_out = JI2 & !F1L66 & F1_CntTe[20] & !F1_CntTe[19];
F1_CntTe[20]_p2_out = JI2 & !F1L66 & !F1_CntTe[20] & F1_CntTe[19] & F1_CntTe[18] & F1_CntTe[17] & F1_CntTe[16] & F1_CntTe[14] & F1_CntTe[15] & F1_CntTe[12] & F1_CntTe[13] & F1_CntTe[10] & F1_CntTe[11] & F1_CntTe[8] & F1_CntTe[9] & F1_CntTe[6] & F1_CntTe[7] & F1_CntTe[4] & F1_CntTe[5] & F1_CntTe[2] & F1_CntTe[3] & F1_CntTe[0] & F1_CntTe[1];
F1_CntTe[20]_p4_out = JI2 & F1_CntTe[20] & F1_CntTe[17] & F1L44;
F1_CntTe[20]_or_out = F1L26 # F1_CntTe[20]_p0_out # F1_CntTe[20]_p1_out # F1_CntTe[20]_p2_out # F1_CntTe[20]_p4_out;
F1_CntTe[20]_reg_input = F1_CntTe[20]_or_out;
F1_CntTe[20]_p3_out = F1L27 & F1L37;
F1_CntTe[20] = DFFE(F1_CntTe[20]_reg_input, GLOBAL(Clock), , , F1_CntTe[20]_p3_out);


--C1_oDIG[0] is SEGCtr:inst5|oDIG[0] at LC89
C1_oDIG[0]_p0_out = !C1_cnt[5] & !C1_cnt[6] & !C1_cnt[7] & !C1_cnt[1] & !C1_cnt[3] & C1_cnt[4] & C1_cnt[2] & !C1_cnt[0] & C1_oDIG[0] & !F1_CntTe[16];
C1_oDIG[0]_p1_out = !F1_CntTe[4] & !C1_cnt[5] & !C1_cnt[6] & !C1_cnt[7] & !C1_cnt[1] & !C1_cnt[3] & !C1_cnt[4] & C1_cnt[2] & C1_cnt[0] & C1_oDIG[0];
C1_oDIG[0]_p2_out = !C1_cnt[5] & !C1_cnt[6] & !C1_cnt[7] & !C1_cnt[1] & !C1_cnt[3] & !C1_cnt[4] & !C1_cnt[2] & !C1_cnt[0] & C1_oDIG[0] & !F1_CntTe[0];
C1_oDIG[0]_p4_out = !C1_cnt[5] & !C1_cnt[6] & !C1_cnt[7] & !C1_cnt[1] & C1_cnt[3] & C1_cnt[4] & !C1_cnt[2] & C1_cnt[0] & C1_oDIG[0] & !F1_CntTe[20];
C1_oDIG[0]_or_out = C1L9 # C1_oDIG[0]_p0_out # C1_oDIG[0]_p1_out # C1_oDIG[0]_p2_out # C1_oDIG[0]_p4_out;
C1_oDIG[0]_reg_input = C1_oDIG[0]_or_out;
C1_oDIG[0] = TFFE(C1_oDIG[0]_reg_input, E1_CLK2, , , );


--L81L1 is Decoder:inst9|lpm_add_sub:add_rtl_0|addcore:adder[2]|a_csnbuffer:result_node|sout_node[5]~20 at LC13
L81L1_p1_out = F1_CntTe[20] & F1_CntTe[19] & F1_CntTe[18] & F1_CntTe[17] & F1_CntTe[16] & F1_CntTe[14] & F1_CntTe[15] & F1_CntTe[12] & F1_CntTe[13] & F1_CntTe[10] & F1_CntTe[11] & F1_CntTe[8] & F1_CntTe[9] & F1_CntTe[6] & F1_CntTe[7] & F1_CntTe[4] & F1_CntTe[5] & F1_CntTe[2] & F1_CntTe[3] & F1_CntTe[0] & F1_CntTe[1];
L81L1_or_out = F1_CntTe[21];
L81L1 = L81L1_p1_out $ L81L1_or_out;


--L72L1 is Decoder:inst9|lpm_add_sub:add_rtl_1|addcore:adder[2]|a_csnbuffer:result_node|sout_node[5]~20 at LC3
L72L1_p1_out = !F1_CntTe[20] & !F1_CntTe[14] & !F1_CntTe[15] & !F1_CntTe[12] & !F1_CntTe[13] & !F1_CntTe[10] & !F1_CntTe[11] & !F1_CntTe[8] & !F1_CntTe[9] & !F1_CntTe[6] & !F1_CntTe[7] & !F1_CntTe[4] & !F1_CntTe[5] & !F1_CntTe[2] & !F1_CntTe[3] & !F1_CntTe[0] & !F1_CntTe[1] & !F1_CntTe[19] & !F1_CntTe[18] & !F1_CntTe[16] & !F1_CntTe[17];
L72L1_or_out = !F1_CntTe[21];
L72L1 = L72L1_p1_out $ L72L1_or_out;


--F1_CntTe[21] is Decoder:inst9|CntTe[21] at LC50
F1_CntTe[21]_p1_out = JI2 & F1L66 & !L72L1;
F1_CntTe[21]_p2_out = JI2 & !F1L66 & L81L1;
F1_CntTe[21]_or_out = F1_CntTe[21]_p1_out # F1_CntTe[21]_p2_out;
F1_CntTe[21]_reg_input = F1_CntTe[21]_or_out;
F1_CntTe[21]_p3_out = F1L47 & F1L57;
F1_CntTe[21] = DFFE(F1_CntTe[21]_reg_input, GLOBAL(Clock), , , F1_CntTe[21]_p3_out);


--C1_oDIG[1] is SEGCtr:inst5|oDIG[1] at LC96
C1_oDIG[1]_p0_out = !C1_cnt[5] & !C1_cnt[6] & !C1_cnt[7] & !C1_cnt[1] & !C1_cnt[3] & C1_cnt[4] & C1_cnt[2] & !C1_cnt[0] & C1_oDIG[1] & !F1_CntTe[17];
C1_oDIG[1]_p1_out = !F1_CntTe[5] & !C1_cnt[5] & !C1_cnt[6] & !C1_cnt[7] & !C1_cnt[1] & !C1_cnt[3] & !C1_cnt[4] & C1_cnt[2] & C1_cnt[0] & C1_oDIG[1];
C1_oDIG[1]_p2_out = !C1_cnt[5] & !C1_cnt[6] & !C1_cnt[7] & !C1_cnt[1] & !C1_cnt[3] & !C1_cnt[4] & !C1_cnt[2] & !C1_cnt[0] & C1_oDIG[1] & !F1_CntTe[1];
C1_oDIG[1]_p4_out = !C1_cnt[5] & !C1_cnt[6] & !C1_cnt[7] & !C1_cnt[1] & C1_cnt[3] & C1_cnt[4] & !C1_cnt[2] & C1_cnt[0] & C1_oDIG[1] & !F1_CntTe[21];
C1_oDIG[1]_or_out = C1L11 # C1_oDIG[1]_p0_out # C1_oDIG[1]_p1_out # C1_oDIG[1]_p2_out # C1_oDIG[1]_p4_out;
C1_oDIG[1]_reg_input = C1_oDIG[1]_or_out;
C1_oDIG[1] = TFFE(C1_oDIG[1]_reg_input, E1_CLK2, , , );


--F1L64 is Decoder:inst9|CntTe~5267 at SEXP13
F1L64 = EXP(F1_CntTe[0] & F1_CntTe[3] & F1_CntTe[2] & F1_CntTe[5] & F1_CntTe[4] & F1_CntTe[7] & F1_CntTe[6] & F1_CntTe[9] & F1_CntTe[8] & F1_CntTe[11] & F1_CntTe[10] & F1_CntTe[13] & F1_CntTe[12] & F1_CntTe[15] & F1_CntTe[14] & F1_CntTe[18] & F1_CntTe[19] & F1_CntTe[20]);


--F1L74 is Decoder:inst9|CntTe~5268 at SEXP14
F1L74 = EXP(!F1_CntTe[18] & !F1_CntTe[19] & !F1_CntTe[0] & !F1_CntTe[3] & !F1_CntTe[2] & !F1_CntTe[5] & !F1_CntTe[4] & !F1_CntTe[7] & !F1_CntTe[6] & !F1_CntTe[9] & !F1_CntTe[8] & !F1_CntTe[11] & !F1_CntTe[10] & !F1_CntTe[13] & !F1_CntTe[12] & !F1_CntTe[15] & !F1_CntTe[14] & !F1_CntTe[21]);


--F1_CntTe[22] is Decoder:inst9|CntTe[22] at LC6
F1_CntTe[22]_p0_out = JI2 & F1_CntTe[22] & !F1_CntTe[1] & F1L74;
F1_CntTe[22]_p1_out = JI2 & !F1L66 & F1_CntTe[22] & !F1_CntTe[21];
F1_CntTe[22]_p2_out = JI2 & !F1L66 & !F1_CntTe[22] & F1_CntTe[21] & F1_CntTe[20] & F1_CntTe[19] & F1_CntTe[18] & F1_CntTe[17] & F1_CntTe[16] & F1_CntTe[14] & F1_CntTe[15] & F1_CntTe[12] & F1_CntTe[13] & F1_CntTe[10] & F1_CntTe[11] & F1_CntTe[8] & F1_CntTe[9] & F1_CntTe[6] & F1_CntTe[7] & F1_CntTe[4] & F1_CntTe[5] & F1_CntTe[2] & F1_CntTe[3] & F1_CntTe[0] & F1_CntTe[1];
F1_CntTe[22]_p4_out = JI2 & F1_CntTe[22] & F1_CntTe[17] & F1L64;
F1_CntTe[22]_or_out = F1L36 # F1_CntTe[22]_p0_out # F1_CntTe[22]_p1_out # F1_CntTe[22]_p2_out # F1_CntTe[22]_p4_out;
F1_CntTe[22]_reg_input = F1_CntTe[22]_or_out;
F1_CntTe[22]_p3_out = F1L27 & F1L37;
F1_CntTe[22] = DFFE(F1_CntTe[22]_reg_input, GLOBAL(Clock), , , F1_CntTe[22]_p3_out);


--C1_oDIG[2] is SEGCtr:inst5|oDIG[2] at LC103
C1_oDIG[2]_p0_out = !C1_cnt[5] & !C1_cnt[6] & !C1_cnt[7] & !C1_cnt[1] & !C1_cnt[3] & C1_cnt[4] & C1_cnt[2] & !C1_cnt[0] & C1_oDIG[2] & !F1_CntTe[18];
C1_oDIG[2]_p1_out = !F1_CntTe[6] & !C1_cnt[5] & !C1_cnt[6] & !C1_cnt[7] & !C1_cnt[1] & !C1_cnt[3] & !C1_cnt[4] & C1_cnt[2] & C1_cnt[0] & C1_oDIG[2];
C1_oDIG[2]_p2_out = !C1_cnt[5] & !C1_cnt[6] & !C1_cnt[7] & !C1_cnt[1] & !C1_cnt[3] & !C1_cnt[4] & !C1_cnt[2] & !C1_cnt[0] & C1_oDIG[2] & !F1_CntTe[2];
C1_oDIG[2]_p4_out = !C1_cnt[5] & !C1_cnt[6] & !C1_cnt[7] & !C1_cnt[1] & C1_cnt[3] & C1_cnt[4] & !C1_cnt[2] & C1_cnt[0] & C1_oDIG[2] & !F1_CntTe[22];
C1_oDIG[2]_or_out = C1L31 # C1_oDIG[2]_p0_out # C1_oDIG[2]_p1_out # C1_oDIG[2]_p2_out # C1_oDIG[2]_p4_out;
C1_oDIG[2]_reg_input = C1_oDIG[2]_or_out;
C1_oDIG[2] = TFFE(C1_oDIG[2]_reg_input, E1_CLK2, , , );


--F1L84 is Decoder:inst9|CntTe~5275 at SEXP15
F1L84 = EXP(F1_CntTe[0] & F1_CntTe[3] & F1_CntTe[2] & F1_CntTe[5] & F1_CntTe[4] & F1_CntTe[7] & F1_CntTe[6] & F1_CntTe[9] & F1_CntTe[8] & F1_CntTe[11] & F1_CntTe[10] & F1_CntTe[13] & F1_CntTe[12] & F1_CntTe[15] & F1_CntTe[16] & F1_CntTe[17] & F1_CntTe[18] & F1_CntTe[19]);


--F1L94 is Decoder:inst9|CntTe~5276 at SEXP16
F1L94 = EXP(!F1_CntTe[17] & !F1_CntTe[16] & !F1_CntTe[18] & !F1_CntTe[19] & !F1_CntTe[0] & !F1_CntTe[3] & !F1_CntTe[2] & !F1_CntTe[5] & !F1_CntTe[4] & !F1_CntTe[7] & !F1_CntTe[6] & !F1_CntTe[9] & !F1_CntTe[8] & !F1_CntTe[11] & !F1_CntTe[10] & !F1_CntTe[13] & !F1_CntTe[12] & !F1_CntTe[15]);


--F1_CntTe[23] is Decoder:inst9|CntTe[23] at LC8
F1_CntTe[23]_p0_out = JI2 & F1_CntTe[23] & !F1_CntTe[1] & F1L94;
F1_CntTe[23]_p1_out = JI2 & !F1L66 & F1_CntTe[23] & !F1_CntTe[22];
F1_CntTe[23]_p2_out = JI2 & !F1L66 & !F1_CntTe[23] & F1_CntTe[22] & F1_CntTe[21] & F1_CntTe[20] & F1_CntTe[19] & F1_CntTe[18] & F1_CntTe[17] & F1_CntTe[16] & F1_CntTe[14] & F1_CntTe[15] & F1_CntTe[12] & F1_CntTe[13] & F1_CntTe[10] & F1_CntTe[11] & F1_CntTe[8] & F1_CntTe[9] & F1_CntTe[6] & F1_CntTe[7] & F1_CntTe[4] & F1_CntTe[5] & F1_CntTe[2] & F1_CntTe[3] & F1_CntTe[0] & F1_CntTe[1];
F1_CntTe[23]_p4_out = JI2 & F1_CntTe[23] & F1_CntTe[21] & F1L84;
F1_CntTe[23]_or_out = F1L46 # F1_CntTe[23]_p0_out # F1_CntTe[23]_p1_out # F1_CntTe[23]_p2_out # F1_CntTe[23]_p4_out;
F1_CntTe[23]_reg_input = F1_CntTe[23]_or_out;
F1_CntTe[23]_p3_out = F1L27 & F1L37;
F1_CntTe[23] = DFFE(F1_CntTe[23]_reg_input, GLOBAL(Clock), , , F1_CntTe[23]_p3_out);


--C1_oDIG[3] is SEGCtr:inst5|oDIG[3] at LC108
C1_oDIG[3]_p0_out = !C1_cnt[5] & !C1_cnt[6] & !C1_cnt[7] & !C1_cnt[1] & !C1_cnt[3] & C1_cnt[4] & C1_cnt[2] & !C1_cnt[0] & C1_oDIG[3] & !F1_CntTe[19];
C1_oDIG[3]_p1_out = !F1_CntTe[7] & !C1_cnt[5] & !C1_cnt[6] & !C1_cnt[7] & !C1_cnt[1] & !C1_cnt[3] & !C1_cnt[4] & C1_cnt[2] & C1_cnt[0] & C1_oDIG[3];
C1_oDIG[3]_p2_out = !C1_cnt[5] & !C1_cnt[6] & !C1_cnt[7] & !C1_cnt[1] & !C1_cnt[3] & !C1_cnt[4] & !C1_cnt[2] & !C1_cnt[0] & C1_oDIG[3] & !F1_CntTe[3];
C1_oDIG[3]_p4_out = !C1_cnt[5] & !C1_cnt[6] & !C1_cnt[7] & !C1_cnt[1] & C1_cnt[3] & C1_cnt[4] & !C1_cnt[2] & C1_cnt[0] & C1_oDIG[3] & !F1_CntTe[23];
C1_oDIG[3]_or_out = C1L51 # C1_oDIG[3]_p0_out # C1_oDIG[3]_p1_out # C1_oDIG[3]_p2_out # C1_oDIG[3]_p4_out;
C1_oDIG[3]_reg_input = C1_oDIG[3]_or_out;
C1_oDIG[3] = TFFE(C1_oDIG[3]_reg_input, E1_CLK2, , , );


--D1L11 is SEG7_LUT:inst6|reduce_or~473 at LC97
D1L11_p1_out = !C1_oDIG[2] & !C1_oDIG[1];
D1L11_or_out = D1L11_p1_out # !C1_oDIG[3];
D1L11 = D1L11_or_out;


--D1L01 is SEG7_LUT:inst6|oSEG~208 at LC111
D1L01_p1_out = C1_oDIG[2] & !C1_oDIG[3] & C1_oDIG[0] & !C1_oDIG[1];
D1L01_p2_out = C1_oDIG[2] & !C1_oDIG[3] & !C1_oDIG[0] & C1_oDIG[1];
D1L01_or_out = D1L01_p1_out # D1L01_p2_out;
D1L01 = D1L01_or_out;


--D1L31 is SEG7_LUT:inst6|reduce_or~476 at LC110
D1L31_p1_out = C1_oDIG[2] & !C1_oDIG[1];
D1L31_p2_out = C1_oDIG[1] & C1_oDIG[3];
D1L31_or_out = D1L31_p1_out # D1L31_p2_out # C1_oDIG[0];
D1L31 = D1L31_or_out;


--D1L9 is SEG7_LUT:inst6|oSEG~202 at LC98
D1L9_p1_out = C1_oDIG[2] & !C1_oDIG[1];
D1L9_p2_out = !C1_oDIG[2] & C1_oDIG[1];
D1L9_or_out = D1L9_p1_out # D1L9_p2_out # C1_oDIG[3] # !C1_oDIG[0];
D1L9 = D1L9_or_out;


--D1L8 is SEG7_LUT:inst6|oSEG[6]~235 at LC83
D1L8_p1_out = !D1L9 & D1L11;
D1L8_p2_out = !D1L11 & D1L8;
D1L8_p3_out = !D1L9 & D1L8;
D1L8_or_out = D1L8_p1_out # D1L8_p2_out # D1L8_p3_out;
D1L8 = D1L8_or_out;


--D1L7 is SEG7_LUT:inst6|oSEG[5]~239 at LC67
D1L7_p1_out = D1L11 & D1L21;
D1L7_p2_out = !D1L11 & D1L7;
D1L7_p3_out = D1L7 & D1L21;
D1L7_or_out = D1L7_p1_out # D1L7_p2_out # D1L7_p3_out;
D1L7 = D1L7_or_out;


--D1L6 is SEG7_LUT:inst6|oSEG[4]~243 at LC49
D1L6_p1_out = D1L31 & D1L11;
D1L6_p2_out = !D1L11 & D1L6;
D1L6_p3_out = D1L31 & D1L6;
D1L6_or_out = D1L6_p1_out # D1L6_p2_out # D1L6_p3_out;
D1L6 = D1L6_or_out;


--D1L5 is SEG7_LUT:inst6|oSEG[3]~247 at LC53
D1L5_p1_out = D1L11 & D1L41;
D1L5_p2_out = !D1L11 & D1L5;
D1L5_p3_out = D1L5 & D1L41;
D1L5_or_out = D1L5_p1_out # D1L5_p2_out # D1L5_p3_out;
D1L5 = D1L5_or_out;


--D1L4 is SEG7_LUT:inst6|oSEG[2]~251 at LC56