dds.map.qmsg

在quartus软件下用VHDL语言实现DDS

{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram juchi_rom:inst28\|altsyncram:altsyncram_component " "Info: Elaborating entity \"altsyncram\" for hierarchy \"juchi_rom:inst28\|altsyncram:altsyncram_component\"" {  } { { "juchi_rom/juchi_rom.vhd" "altsyncram_component" { Text "D:/dds_bate4/juchi_rom/juchi_rom.vhd" 80 -1 0 } }  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_c3s.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/altsyncram_c3s.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_c3s " "Info: Found entity 1: altsyncram_c3s" {  } { { "db/altsyncram_c3s.tdf" "" { Text "D:/dds_bate4/db/altsyncram_c3s.tdf" 34 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram_c3s juchi_rom:inst28\|altsyncram:altsyncram_component\|altsyncram_c3s:auto_generated " "Info: Elaborating entity \"altsyncram_c3s\" for hierarchy \"juchi_rom:inst28\|altsyncram:altsyncram_component\|altsyncram_c3s:auto_generated\"" {  } { { "altsyncram.tdf" "auto_generated" { Text "c:/altera/quartus50/libraries/megafunctions/altsyncram.tdf" 903 3 0 } }  } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "phase_add phase_add:inst4 " "Info: Elaborating entity \"phase_add\" for hierarchy \"phase_add:inst4\"" {  } { { "dds.bdf" "inst4" { Schematic "D:/dds_bate4/dds.bdf" { { 24 688 864 120 "inst4" "" } } } }  } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "juxing_rom juxing_rom:inst29 " "Info: Elaborating entity \"juxing_rom\" for hierarchy \"juxing_rom:inst29\"" {  } { { "dds.bdf" "inst29" { Schematic "D:/dds_bate4/dds.bdf" { { 280 952 1112 360 "inst29" "" } } } }  } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram juxing_rom:inst29\|altsyncram:altsyncram_component " "Info: Elaborating entity \"altsyncram\" for hierarchy \"juxing_rom:inst29\|altsyncram:altsyncram_component\"" {  } { { "juxing_rom/juxing_rom.vhd" "altsyncram_component" { Text "D:/dds_bate4/juxing_rom/juxing_rom.vhd" 80 -1 0 } }  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_ifs.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/altsyncram_ifs.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_ifs " "Info: Found entity 1: altsyncram_ifs" {  } { { "db/altsyncram_ifs.tdf" "" { Text "D:/dds_bate4/db/altsyncram_ifs.tdf" 34 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram_ifs juxing_rom:inst29\|altsyncram:altsyncram_component\|altsyncram_ifs:auto_generated " "Info: Elaborating entity \"altsyncram_ifs\" for hierarchy \"juxing_rom:inst29\|altsyncram:altsyncram_component\|altsyncram_ifs:auto_generated\"" {  } { { "altsyncram.tdf" "auto_generated" { Text "c:/altera/quartus50/libraries/megafunctions/altsyncram.tdf" 903 3 0 } }  } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "sanjiao_rom sanjiao_rom:inst27 " "Info: Elaborating entity \"sanjiao_rom\" for hierarchy \"sanjiao_rom:inst27\"" {  } { { "dds.bdf" "inst27" { Schematic "D:/dds_bate4/dds.bdf" { { 120 952 1112 200 "inst27" "" } } } }  } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram sanjiao_rom:inst27\|altsyncram:altsyncram_component " "Info: Elaborating entity \"altsyncram\" for hierarchy \"sanjiao_rom:inst27\|altsyncram:altsyncram_component\"" {  } { { "sanjiao_rom/sanjiao_rom.vhd" "altsyncram_component" { Text "D:/dds_bate4/sanjiao_rom/sanjiao_rom.vhd" 80 -1 0 } }  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_2ns.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/altsyncram_2ns.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_2ns " "Info: Found entity 1: altsyncram_2ns" {  } { { "db/altsyncram_2ns.tdf" "" { Text "D:/dds_bate4/db/altsyncram_2ns.tdf" 34 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram_2ns sanjiao_rom:inst27\|altsyncram:altsyncram_component\|altsyncram_2ns:auto_generated " "Info: Elaborating entity \"altsyncram_2ns\" for hierarchy \"sanjiao_rom:inst27\|altsyncram:altsyncram_component\|altsyncram_2ns:auto_generated\"" {  } { { "altsyncram.tdf" "auto_generated" { Text "c:/altera/quartus50/libraries/megafunctions/altsyncram.tdf" 903 3 0 } }  } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "sine_rom sine_rom:inst31 " "Info: Elaborating entity \"sine_rom\" for hierarchy \"sine_rom:inst31\"" {  } { { "dds.bdf" "inst31" { Schematic "D:/dds_bate4/dds.bdf" { { 24 952 1104 120 "inst31" "" } } } }  } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram sine_rom:inst31\|altsyncram:altsyncram_component " "Info: Elaborating entity \"altsyncram\" for hierarchy \"sine_rom:inst31\|altsyncram:altsyncram_component\"" {  } { { "sine_rom/sine_rom.vhd" "altsyncram_component" { Text "D:/dds_bate4/sine_rom/sine_rom.vhd" 80 -1 0 } }  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_0qr.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/altsyncram_0qr.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_0qr " "Info: Found entity 1: altsyncram_0qr" {  } { { "db/altsyncram_0qr.tdf" "" { Text "D:/dds_bate4/db/altsyncram_0qr.tdf" 34 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram_0qr sine_rom:inst31\|altsyncram:altsyncram_component\|altsyncram_0qr:auto_generated " "Info: Elaborating entity \"altsyncram_0qr\" for hierarchy \"sine_rom:inst31\|altsyncram:altsyncram_component\|altsyncram_0qr:auto_generated\"" {  } { { "altsyncram.tdf" "auto_generated" { Text "c:/altera/quartus50/libraries/megafunctions/altsyncram.tdf" 903 3 0 } }  } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "cos_rom cos_rom:inst38 " "Info: Elaborating entity \"cos_rom\" for hierarchy \"cos_rom:inst38\"" {  } { { "dds.bdf" "inst38" { Schematic "D:/dds_bate4/dds.bdf" { { 376 952 1112 456 "inst38" "" } } } }  } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram cos_rom:inst38\|altsyncram:altsyncram_component " "Info: Elaborating entity \"altsyncram\" for hierarchy \"cos_rom:inst38\|altsyncram:altsyncram_component\"" {  } { { "cos_rom/cos_rom.vhd" "altsyncram_component" { Text "D:/dds_bate4/cos_rom/cos_rom.vhd" 80 -1 0 } }  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_2gr.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/altsyncram_2gr.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_2gr " "Info: Found entity 1: altsyncram_2gr" {  } { { "db/altsyncram_2gr.tdf" "" { Text "D:/dds_bate4/db/altsyncram_2gr.tdf" 34 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram_2gr cos_rom:inst38\|altsyncram:altsyncram_component\|altsyncram_2gr:auto_generated " "Info: Elaborating entity \"altsyncram_2gr\" for hierarchy \"cos_rom:inst38\|altsyncram:altsyncram_component\|altsyncram_2gr:auto_generated\"" {  } { { "altsyncram.tdf" "auto_generated" { Text "c:/altera/quartus50/libraries/megafunctions/altsyncram.tdf" 903 3 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "counter:inst2\|temp_pht\[7\] data_in GND " "Warning: Reduced register \"counter:inst2\|temp_pht\[7\]\" with stuck data_in port to stuck value GND" {  } { { "counter.vhd" "" { Text "D:/dds_bate4/counter.vhd" 17 -1 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "counter:inst2\|temp_pht\[6\] data_in GND " "Warning: Reduced register \"counter:inst2\|temp_pht\[6\]\" with stuck data_in port to stuck value GND" {  } { { "counter.vhd" "" { Text "D:/dds_bate4/counter.vhd" 17 -1 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "counter:inst2\|temp_pht\[5\] data_in GND " "Warning: Reduced register \"counter:inst2\|temp_pht\[5\]\" with stuck data_in port to stuck value GND" {  } { { "counter.vhd" "" { Text "D:/dds_bate4/counter.vhd" 17 -1 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "counter:inst2\|temp_pht\[4\] data_in GND " "Warning: Reduced register \"counter:inst2\|temp_pht\[4\]\" with stuck data_in port to stuck value GND" {  } { { "counter.vhd" "" { Text "D:/dds_bate4/counter.vhd" 17 -1 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "counter:inst2\|temp_pht\[3\] data_in GND " "Warning: Reduced register \"counter:inst2\|temp_pht\[3\]\" with stuck data_in port to stuck value GND" {  } { { "counter.vhd" "" { Text "D:/dds_bate4/counter.vhd" 17 -1 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "counter:inst2\|temp_pht\[2\] data_in GND " "Warning: Reduced register \"counter:inst2\|temp_pht\[2\]\" with stuck data_in port to stuck value GND" {  } { { "counter.vhd" "" { Text "D:/dds_bate4/counter.vhd" 17 -1 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "counter:inst2\|temp_pht\[1\] data_in GND " "Warning: Reduced register \"counter:inst2\|temp_pht\[1\]\" with stuck data_in port to stuck value GND" {  } { { "counter.vhd" "" { Text "D:/dds_bate4/counter.vhd" 17 -1 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "counter:inst2\|temp_pht\[0\] data_in GND " "Warning: Reduced register \"counter:inst2\|temp_pht\[0\]\" with stuck data_in port to stuck value GND" {  } { { "counter.vhd" "" { Text "D:/dds_bate4/counter.vhd" 17 -1 0 } }  } 0}
{ "Info" "IOPT_MLS_DUP_REG_INFO_HDR" "" "Info: Duplicate registers merged to single register" { { "Info" "IOPT_MLS_DUP_REG_INFO" "xianshi:inst6\|m8:inst1\|m8t\[0\] fp:inst\|fpq:inst2\|temp\[0\] " "Info: Duplicate register \"xianshi:inst6\|m8:inst1\|m8t\[0\]\" merged to single register \"fp:inst\|fpq:inst2\|temp\[0\]\"" {  } { { "m8.vhd" "" { Text "D:/dds_bate4/m8.vhd" 14 -1 0 } }  } 0}  } {  } 0}
{ "Info" "IOPT_MLS_DUP_REG_INFO_HDR" "" "Info: Duplicate registers merged to single register" { { "Info" "IOPT_MLS_DUP_REG_INFO" "fp:inst\|fpq:inst2\|temp\[1\] xianshi:inst6\|m8:inst1\|m8t\[1\] " "Info: Duplicate register \"fp:inst\|fpq:inst2\|temp\[1\]\" merged to single register \"xianshi:inst6\|m8:inst1\|m8t\[1\]\"" {  } { { "fpq.vhd" "" { Text "D:/dds_bate4/fpq.vhd" 12 -1 0 } }  } 0}  } {  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "fp:inst\|fpq:inst3\|temp\[1\] data_in GND " "Warning: Reduced register \"fp:inst\|fpq:inst3\|temp\[1\]\" with stuck data_in port to stuck value GND" {  } { { "fpq.vhd" "" { Text "D:/dds_bate4/fpq.vhd" 12 -1 0 } }  } 0}
{ "Info" "IOPT_MLS_DUP_REG_INFO_HDR" "" "Info: Duplicate registers merged to single register" { { "Info" "IOPT_MLS_DUP_REG_INFO_POWER_UP_CHANGE" "fp:inst\|fpq:inst3\|temp\[0\] fp:inst\|fpq:inst3\|clkout " "Info: Duplicate register \"fp:inst\|fpq:inst3\|temp\[0\]\" merged to single register \"fp:inst\|fpq:inst3\|clkout\", power-up level changed" {  } { { "fpq.vhd" "" { Text "D:/dds_bate4/fpq.vhd" 12 -1 0 } }  } 0}  } {  } 0}
{ "Warning" "WOPT_MLS_STUCK_PIN_HDR" "" "Warning: Output pins are stuck at VCC or GND" { { "Warning" "WOPT_MLS_STUCK_PIN" "DA1_mode GND " "Warning: Pin \"DA1_mode\" stuck at GND" {  } { { "dds.bdf" "" { Schematic "D:/dds_bate4/dds.bdf" { { -56 960 1136 -40 "DA1_mode" "" } } } }  } 0} { "Warning" "WOPT_MLS_STUCK_PIN" "DA2_mode GND " "Warning: Pin \"DA2_mode\" stuck at GND" {  } { { "dds.bdf" "" { Schematic "D:/dds_bate4/dds.bdf" { { -72 960 1136 -56 "DA2_mode" "" } } } }  } 0}  } {  } 0}
{ "Info" "ISCL_SCL_TM_SUMMARY" "304 " "Info: Implemented 304 device resources after synthesis - the final resource count might be different" { { "Info" "ISCL_SCL_TM_IPINS" "7 " "Info: Implemented 7 input pins" {  } {  } 0} { "Info" "ISCL_SCL_TM_OPINS" "38 " "Info: Implemented 38 output pins" {  } {  } 0} { "Info" "ISCL_SCL_TM_LCELLS" "209 " "Info: Implemented 209 logic cells" {  } {  } 0} { "Info" "ISCL_SCL_TM_RAMS" "50 " "Info: Implemented 50 RAM segments" {  } {  } 0}  } {  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 44 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 44 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Thu Apr 03 15:45:45 2008 " "Info: Processing ended: Thu Apr 03 15:45:45 2008" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:06 " "Info: Elapsed time: 00:00:06" {  } {  } 0}  } {  } 0}