ch_fir.sim.rpt

基于分布式算法的FPGA实现的FIR滤波器源码

; Generate VCD File for PowerPlay Power Analyzer                                             ; Off        ; Off           ;
; Group bus channels in simulation results                                                   ; Off        ; Off           ;
; Preserve fewer signal transitions to reduce memory requirements                            ; On         ; On            ;
; Trigger vector comparison with the specified mode                                          ; INPUT_EDGE ; INPUT_EDGE    ;
; Disable setup and hold time violations detection in input registers of bi-directional pins ; Off        ; Off           ;
; Overwrite Waveform Inputs With Simulation Outputs                                          ; Off        ;               ;
; Glitch Filtering                                                                           ; Off        ; Off           ;
+--------------------------------------------------------------------------------------------+------------+---------------+


+----------------------+
; Simulation Waveforms ;
+----------------------+
Waveform report data cannot be output to ASCII.
Please use Quartus II to view the waveform report data.


+-------------------------------------------------------------------------------------------------------+
; |CH_FIR|mac:inst2|rom:inst1|altsyncram:altsyncram_component|altsyncram_jp61:auto_generated|ALTSYNCRAM ;
+-------------------------------------------------------------------------------------------------------+
Memory report data cannot be output to ASCII.
Please use Quartus II to view the memory report data.


+--------------------------------------------------------------------+
; Coverage Summary                                                   ;
+-----------------------------------------------------+--------------+
; Type                                                ; Value        ;
+-----------------------------------------------------+--------------+
; Total coverage as a percentage                      ;      92.28 % ;
; Total nodes checked                                 ; 240          ;
; Total output ports checked                          ; 259          ;
; Total output ports with complete 1/0-value coverage ; 239          ;
; Total output ports with no 1/0-value coverage       ; 18           ;
; Total output ports with no 1-value coverage         ; 19           ;
; Total output ports with no 0-value coverage         ; 19           ;
+-----------------------------------------------------+--------------+


The following table displays output ports that toggle between 1 and 0 during simulation.
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Complete 1/0-Value Coverage                                                                                                                                                                                                    ;
+---------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------+------------------+
; Node Name                                                                                               ; Output Port Name                                                                                  ; Output Port Type ;
+---------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------+------------------+
; |CH_FIR|mac:inst2|rom:inst1|altsyncram:altsyncram_component|altsyncram_jp61:auto_generated|ram_block1a0 ; |CH_FIR|mac:inst2|rom:inst1|altsyncram:altsyncram_component|altsyncram_jp61:auto_generated|q_a[0] ; portadataout0    ;
; |CH_FIR|mac:inst2|rom:inst1|altsyncram:altsyncram_component|altsyncram_jp61:auto_generated|ram_block1a0 ; |CH_FIR|mac:inst2|rom:inst1|altsyncram:altsyncram_component|altsyncram_jp61:auto_generated|q_a[1] ; portadataout1    ;
; |CH_FIR|mac:inst2|rom:inst1|altsyncram:altsyncram_component|altsyncram_jp61:auto_generated|ram_block1a0 ; |CH_FIR|mac:inst2|rom:inst1|altsyncram:altsyncram_component|altsyncram_jp61:auto_generated|q_a[2] ; portadataout2    ;
; |CH_FIR|mac:inst2|rom:inst1|altsyncram:altsyncram_component|altsyncram_jp61:auto_generated|ram_block1a0 ; |CH_FIR|mac:inst2|rom:inst1|altsyncram:altsyncram_component|altsyncram_jp61:auto_generated|q_a[3] ; portadataout3    ;
; |CH_FIR|mac:inst2|rom:inst1|altsyncram:altsyncram_component|altsyncram_jp61:auto_generated|ram_block1a0 ; |CH_FIR|mac:inst2|rom:inst1|altsyncram:altsyncram_component|altsyncram_jp61:auto_generated|q_a[4] ; portadataout4    ;
; |CH_FIR|mac:inst2|rom:inst1|altsyncram:altsyncram_component|altsyncram_jp61:auto_generated|ram_block1a0 ; |CH_FIR|mac:inst2|rom:inst1|altsyncram:altsyncram_component|altsyncram_jp61:auto_generated|q_a[5] ; portadataout5    ;
; |CH_FIR|mac:inst2|rom:inst1|altsyncram:altsyncram_component|altsyncram_jp61:auto_generated|ram_block1a0 ; |CH_FIR|mac:inst2|rom:inst1|altsyncram:altsyncram_component|altsyncram_jp61:auto_generated|q_a[6] ; portadataout6    ;
; |CH_FIR|mac:inst2|rom:inst1|altsyncram:altsyncram_component|altsyncram_jp61:auto_generated|ram_block1a0 ; |CH_FIR|mac:inst2|rom:inst1|altsyncram:altsyncram_component|altsyncram_jp61:auto_generated|q_a[7] ; portadataout7    ;
; |CH_FIR|mac:inst2|rom:inst1|altsyncram:altsyncram_component|altsyncram_jp61:auto_generated|ram_block1a0 ; |CH_FIR|mac:inst2|rom:inst1|altsyncram:altsyncram_component|altsyncram_jp61:auto_generated|q_a[8] ; portadataout8    ;
; |CH_FIR|mac:inst2|rom:inst1|altsyncram:altsyncram_component|altsyncram_jp61:auto_generated|ram_block1a0 ; |CH_FIR|mac:inst2|rom:inst1|altsyncram:altsyncram_component|altsyncram_jp61:auto_generated|q_a[9] ; portadataout9    ;
; |CH_FIR|mac:inst2|sa:inst|Add0~132                                                                      ; |CH_FIR|mac:inst2|sa:inst|Add0~132                                                                ; combout          ;
; |CH_FIR|mac:inst2|sa:inst|Add0~132                                                                      ; |CH_FIR|mac:inst2|sa:inst|Add0~133                                                                ; cout             ;
; |CH_FIR|mac:inst2|sa:inst|Add0~134                                                                      ; |CH_FIR|mac:inst2|sa:inst|Add0~134                                                                ; combout          ;
; |CH_FIR|mac:inst2|sa:inst|Add0~134                                                                      ; |CH_FIR|mac:inst2|sa:inst|Add0~135                                                                ; cout             ;
; |CH_FIR|mac:inst2|sa:inst|Add0~136                                                                      ; |CH_FIR|mac:inst2|sa:inst|Add0~136                                                                ; combout          ;
; |CH_FIR|mac:inst2|sa:inst|Add0~136                                                                      ; |CH_FIR|mac:inst2|sa:inst|Add0~137                                                                ; cout             ;
; |CH_FIR|mac:inst2|sa:inst|Add0~138                                                                      ; |CH_FIR|mac:inst2|sa:inst|Add0~138                                                                ; combout          ;
; |CH_FIR|mac:inst2|sa:inst|Add0~138                                                                      ; |CH_FIR|mac:inst2|sa:inst|Add0~139                                                                ; cout             ;
; |CH_FIR|mac:inst2|sa:inst|Add0~140                                                                      ; |CH_FIR|mac:inst2|sa:inst|Add0~140                                                                ; combout          ;
; |CH_FIR|mac:inst2|sa:inst|Add0~140                                                                      ; |CH_FIR|mac:inst2|sa:inst|Add0~141                                                                ; cout             ;
; |CH_FIR|mac:inst2|sa:inst|Add0~142                                                                      ; |CH_FIR|mac:inst2|sa:inst|Add0~142                                                                ; combout          ;
; |CH_FIR|mac:inst2|sa:inst|Add0~142                                                                      ; |CH_FIR|mac:inst2|sa:inst|Add0~143                                                                ; cout             ;
; |CH_FIR|mac:inst2|sa:inst|Add0~144                                                                      ; |CH_FIR|mac:inst2|sa:inst|Add0~144                                                                ; combout          ;
; |CH_FIR|mac:inst2|sa:inst|Add0~144                                                                      ; |CH_FIR|mac:inst2|sa:inst|Add0~145                                                                ; cout             ;
; |CH_FIR|mac:inst2|sa:inst|Add0~146                                                                      ; |CH_FIR|mac:inst2|sa:inst|Add0~146                                                                ; combout          ;
; |CH_FIR|mac:inst2|sa:inst|Add0~146                                                                      ; |CH_FIR|mac:inst2|sa:inst|Add0~147                                                                ; cout             ;
; |CH_FIR|mac:inst2|sa:inst|Add0~148                                                                      ; |CH_FIR|mac:inst2|sa:inst|Add0~148                                                                ; combout          ;
; |CH_FIR|mac:inst2|sa:inst|Add0~148                                                                      ; |CH_FIR|mac:inst2|sa:inst|Add0~149                                                                ; cout             ;
; |CH_FIR|mac:inst2|sa:inst|Add0~150                                                                      ; |CH_FIR|mac:inst2|sa:inst|Add0~150                                                                ; combout          ;
; |CH_FIR|mac:inst2|sa:inst|Add0~150                                                                      ; |CH_FIR|mac:inst2|sa:inst|Add0~151                                                                ; cout             ;
; |CH_FIR|mac:inst2|sa:inst|Add0~152                                                                      ; |CH_FIR|mac:inst2|sa:inst|Add0~152                                                                ; combout          ;