secondwatch.vo

来自「用VERILOG实现的秒表 用VERILOG实现的秒表」· VO 代码 · 共 1,120 行 · 第 1/5 页

VO
1,120 行
字号
12345

	.clk(gnd),
	.dataa(vcc),
	.datab(vcc),
	.datac(vcc),
	.datad(\fenpin_inst|lpm_counter_component|auto_generated|cmpr1_aeb_int~0 ),
	.aclr(gnd),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.cin(\fenpin_inst|lpm_counter_component|auto_generated|counter_cella20~COUT ),
	.cin0(gnd),
	.cin1(vcc),
	.inverta(gnd),
	.regcascin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\fenpin_inst|lpm_counter_component|auto_generated|modulus_trigger ),
	.regout(),
	.cout(),
	.cout0(),
	.cout1());
// synopsys translate_off
defparam \fenpin_inst|lpm_counter_component|auto_generated|cout_bit .cin_used = "true";
defparam \fenpin_inst|lpm_counter_component|auto_generated|cout_bit .lut_mask = "fff0";
defparam \fenpin_inst|lpm_counter_component|auto_generated|cout_bit .operation_mode = "normal";
defparam \fenpin_inst|lpm_counter_component|auto_generated|cout_bit .output_mode = "comb_only";
defparam \fenpin_inst|lpm_counter_component|auto_generated|cout_bit .register_cascade_mode = "off";
defparam \fenpin_inst|lpm_counter_component|auto_generated|cout_bit .sum_lutc_input = "cin";
defparam \fenpin_inst|lpm_counter_component|auto_generated|cout_bit .synch_mode = "off";
// synopsys translate_on

// atom is at LC_X7_Y7_N4
cyclone_lcell \fenpin_inst|lpm_counter_component|auto_generated|counter_cella0 (
// Equation(s):
// \fenpin_inst|lpm_counter_component|auto_generated|safe_q [0] = DFFEAS(!\fenpin_inst|lpm_counter_component|auto_generated|safe_q [0], GLOBAL(\clkin~combout ), VCC, , , \~GND , , , \fenpin_inst|lpm_counter_component|auto_generated|modulus_trigger )
// \fenpin_inst|lpm_counter_component|auto_generated|counter_cella0~COUT  = CARRY(\fenpin_inst|lpm_counter_component|auto_generated|safe_q [0])

	.clk(\clkin~combout ),
	.dataa(vcc),
	.datab(\fenpin_inst|lpm_counter_component|auto_generated|safe_q [0]),
	.datac(\~GND ),
	.datad(vcc),
	.aclr(gnd),
	.aload(gnd),
	.sclr(gnd),
	.sload(\fenpin_inst|lpm_counter_component|auto_generated|modulus_trigger ),
	.ena(vcc),
	.cin(gnd),
	.cin0(gnd),
	.cin1(vcc),
	.inverta(gnd),
	.regcascin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(\fenpin_inst|lpm_counter_component|auto_generated|safe_q [0]),
	.cout(\fenpin_inst|lpm_counter_component|auto_generated|counter_cella0~COUT ),
	.cout0(),
	.cout1());
// synopsys translate_off
defparam \fenpin_inst|lpm_counter_component|auto_generated|counter_cella0 .lut_mask = "33cc";
defparam \fenpin_inst|lpm_counter_component|auto_generated|counter_cella0 .operation_mode = "arithmetic";
defparam \fenpin_inst|lpm_counter_component|auto_generated|counter_cella0 .output_mode = "reg_only";
defparam \fenpin_inst|lpm_counter_component|auto_generated|counter_cella0 .register_cascade_mode = "off";
defparam \fenpin_inst|lpm_counter_component|auto_generated|counter_cella0 .sum_lutc_input = "datac";
defparam \fenpin_inst|lpm_counter_component|auto_generated|counter_cella0 .synch_mode = "on";
// synopsys translate_on

// atom is at LC_X7_Y7_N5
cyclone_lcell \fenpin_inst|lpm_counter_component|auto_generated|counter_cella1 (
// Equation(s):
// \fenpin_inst|lpm_counter_component|auto_generated|safe_q [1] = DFFEAS(\fenpin_inst|lpm_counter_component|auto_generated|safe_q [1] $ \fenpin_inst|lpm_counter_component|auto_generated|counter_cella0~COUT , GLOBAL(\clkin~combout ), VCC, , , \~GND , , , 
// \fenpin_inst|lpm_counter_component|auto_generated|modulus_trigger )
// \fenpin_inst|lpm_counter_component|auto_generated|counter_cella1~COUT  = CARRY(!\fenpin_inst|lpm_counter_component|auto_generated|counter_cella0~COUT  # !\fenpin_inst|lpm_counter_component|auto_generated|safe_q [1])
// \fenpin_inst|lpm_counter_component|auto_generated|counter_cella1~COUTCOUT1  = CARRY(!\fenpin_inst|lpm_counter_component|auto_generated|counter_cella0~COUT  # !\fenpin_inst|lpm_counter_component|auto_generated|safe_q [1])

	.clk(\clkin~combout ),
	.dataa(vcc),
	.datab(\fenpin_inst|lpm_counter_component|auto_generated|safe_q [1]),
	.datac(\~GND ),
	.datad(vcc),
	.aclr(gnd),
	.aload(gnd),
	.sclr(gnd),
	.sload(\fenpin_inst|lpm_counter_component|auto_generated|modulus_trigger ),
	.ena(vcc),
	.cin(\fenpin_inst|lpm_counter_component|auto_generated|counter_cella0~COUT ),
	.cin0(gnd),
	.cin1(vcc),
	.inverta(gnd),
	.regcascin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(\fenpin_inst|lpm_counter_component|auto_generated|safe_q [1]),
	.cout(),
	.cout0(\fenpin_inst|lpm_counter_component|auto_generated|counter_cella1~COUT ),
	.cout1(\fenpin_inst|lpm_counter_component|auto_generated|counter_cella1~COUTCOUT1 ));
// synopsys translate_off
defparam \fenpin_inst|lpm_counter_component|auto_generated|counter_cella1 .cin_used = "true";
defparam \fenpin_inst|lpm_counter_component|auto_generated|counter_cella1 .lut_mask = "3c3f";
defparam \fenpin_inst|lpm_counter_component|auto_generated|counter_cella1 .operation_mode = "arithmetic";
defparam \fenpin_inst|lpm_counter_component|auto_generated|counter_cella1 .output_mode = "reg_only";
defparam \fenpin_inst|lpm_counter_component|auto_generated|counter_cella1 .register_cascade_mode = "off";
defparam \fenpin_inst|lpm_counter_component|auto_generated|counter_cella1 .sum_lutc_input = "cin";
defparam \fenpin_inst|lpm_counter_component|auto_generated|counter_cella1 .synch_mode = "on";
// synopsys translate_on

// atom is at LC_X7_Y7_N6
cyclone_lcell \fenpin_inst|lpm_counter_component|auto_generated|counter_cella2 (
// Equation(s):
// \fenpin_inst|lpm_counter_component|auto_generated|safe_q [2] = DFFEAS(\fenpin_inst|lpm_counter_component|auto_generated|safe_q [2] $ (!(!\fenpin_inst|lpm_counter_component|auto_generated|counter_cella0~COUT  & 
// \fenpin_inst|lpm_counter_component|auto_generated|counter_cella1~COUT ) # (\fenpin_inst|lpm_counter_component|auto_generated|counter_cella0~COUT  & \fenpin_inst|lpm_counter_component|auto_generated|counter_cella1~COUTCOUT1 )), GLOBAL(\clkin~combout ), 
// VCC, , , \~GND , , , \fenpin_inst|lpm_counter_component|auto_generated|modulus_trigger )
// \fenpin_inst|lpm_counter_component|auto_generated|counter_cella2~COUT  = CARRY(\fenpin_inst|lpm_counter_component|auto_generated|safe_q [2] & (!\fenpin_inst|lpm_counter_component|auto_generated|counter_cella1~COUT ))
// \fenpin_inst|lpm_counter_component|auto_generated|counter_cella2~COUTCOUT1  = CARRY(\fenpin_inst|lpm_counter_component|auto_generated|safe_q [2] & (!\fenpin_inst|lpm_counter_component|auto_generated|counter_cella1~COUTCOUT1 ))

	.clk(\clkin~combout ),
	.dataa(\fenpin_inst|lpm_counter_component|auto_generated|safe_q [2]),
	.datab(vcc),
	.datac(\~GND ),
	.datad(vcc),
	.aclr(gnd),
	.aload(gnd),
	.sclr(gnd),
	.sload(\fenpin_inst|lpm_counter_component|auto_generated|modulus_trigger ),
	.ena(vcc),
	.cin(\fenpin_inst|lpm_counter_component|auto_generated|counter_cella0~COUT ),
	.cin0(\fenpin_inst|lpm_counter_component|auto_generated|counter_cella1~COUT ),
	.cin1(\fenpin_inst|lpm_counter_component|auto_generated|counter_cella1~COUTCOUT1 ),
	.inverta(gnd),
	.regcascin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(\fenpin_inst|lpm_counter_component|auto_generated|safe_q [2]),
	.cout(),
	.cout0(\fenpin_inst|lpm_counter_component|auto_generated|counter_cella2~COUT ),
	.cout1(\fenpin_inst|lpm_counter_component|auto_generated|counter_cella2~COUTCOUT1 ));
// synopsys translate_off
defparam \fenpin_inst|lpm_counter_component|auto_generated|counter_cella2 .cin0_used = "true";
defparam \fenpin_inst|lpm_counter_component|auto_generated|counter_cella2 .cin1_used = "true";
defparam \fenpin_inst|lpm_counter_component|auto_generated|counter_cella2 .cin_used = "true";
defparam \fenpin_inst|lpm_counter_component|auto_generated|counter_cella2 .lut_mask = "a50a";
defparam \fenpin_inst|lpm_counter_component|auto_generated|counter_cella2 .operation_mode = "arithmetic";
defparam \fenpin_inst|lpm_counter_component|auto_generated|counter_cella2 .output_mode = "reg_only";
defparam \fenpin_inst|lpm_counter_component|auto_generated|counter_cella2 .register_cascade_mode = "off";
defparam \fenpin_inst|lpm_counter_component|auto_generated|counter_cella2 .sum_lutc_input = "cin";
defparam \fenpin_inst|lpm_counter_component|auto_generated|counter_cella2 .synch_mode = "on";
// synopsys translate_on

// atom is at LC_X7_Y7_N7
cyclone_lcell \fenpin_inst|lpm_counter_component|auto_generated|counter_cella3 (
// Equation(s):
// \fenpin_inst|lpm_counter_component|auto_generated|safe_q [3] = DFFEAS(\fenpin_inst|lpm_counter_component|auto_generated|safe_q [3] $ ((!\fenpin_inst|lpm_counter_component|auto_generated|counter_cella0~COUT  & 
// \fenpin_inst|lpm_counter_component|auto_generated|counter_cella2~COUT ) # (\fenpin_inst|lpm_counter_component|auto_generated|counter_cella0~COUT  & \fenpin_inst|lpm_counter_component|auto_generated|counter_cella2~COUTCOUT1 )), GLOBAL(\clkin~combout ), 
// VCC, , , \~GND , , , \fenpin_inst|lpm_counter_component|auto_generated|modulus_trigger )
// \fenpin_inst|lpm_counter_component|auto_generated|counter_cella3~COUT  = CARRY(!\fenpin_inst|lpm_counter_component|auto_generated|counter_cella2~COUT  # !\fenpin_inst|lpm_counter_component|auto_generated|safe_q [3])
// \fenpin_inst|lpm_counter_component|auto_generated|counter_cella3~COUTCOUT1  = CARRY(!\fenpin_inst|lpm_counter_component|auto_generated|counter_cella2~COUTCOUT1  # !\fenpin_inst|lpm_counter_component|auto_generated|safe_q [3])

	.clk(\clkin~combout ),
	.dataa(\fenpin_inst|lpm_counter_component|auto_generated|safe_q [3]),
	.datab(vcc),
	.datac(\~GND ),
	.datad(vcc),
	.aclr(gnd),
	.aload(gnd),
	.sclr(gnd),
	.sload(\fenpin_inst|lpm_counter_component|auto_generated|modulus_trigger ),
	.ena(vcc),
	.cin(\fenpin_inst|lpm_counter_component|auto_generated|counter_cella0~COUT ),
	.cin0(\fenpin_inst|lpm_counter_component|auto_generated|counter_cella2~COUT ),
	.cin1(\fenpin_inst|lpm_counter_component|auto_generated|counter_cella2~COUTCOUT1 ),
	.inverta(gnd),
	.regcascin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(\fenpin_inst|lpm_counter_component|auto_generated|safe_q [3]),
	.cout(),
	.cout0(\fenpin_inst|lpm_counter_component|auto_generated|counter_cella3~COUT ),
	.cout1(\fenpin_inst|lpm_counter_component|auto_generated|counter_cella3~COUTCOUT1 ));
// synopsys translate_off
defparam \fenpin_inst|lpm_counter_component|auto_generated|counter_cella3 .cin0_used = "true";
defparam \fenpin_inst|lpm_counter_component|auto_generated|counter_cella3 .cin1_used = "true";
defparam \fenpin_inst|lpm_counter_component|auto_generated|counter_cella3 .cin_used = "true";
defparam \fenpin_inst|lpm_counter_component|auto_generated|counter_cella3 .lut_mask = "5a5f";
defparam \fenpin_inst|lpm_counter_component|auto_generated|counter_cella3 .operation_mode = "arithmetic";
defparam \fenpin_inst|lpm_counter_component|auto_generated|counter_cella3 .output_mode = "reg_only";
defparam \fenpin_inst|lpm_counter_component|auto_generated|counter_cella3 .register_cascade_mode = "off";
defparam \fenpin_inst|lpm_counter_component|auto_generated|counter_cella3 .sum_lutc_input = "cin";
defparam \fenpin_inst|lpm_counter_component|auto_generated|counter_cella3 .synch_mode = "on";
// synopsys translate_on

// atom is at LC_X7_Y7_N8
cyclone_lcell \fenpin_inst|lpm_counter_component|auto_generated|counter_cella4 (
// Equation(s):
// \fenpin_inst|lpm_counter_component|auto_generated|safe_q [4] = DFFEAS(\fenpin_inst|lpm_counter_component|auto_generated|safe_q [4] $ !(!\fenpin_inst|lpm_counter_component|auto_generated|counter_cella0~COUT  & 
// \fenpin_inst|lpm_counter_component|auto_generated|counter_cella3~COUT ) # (\fenpin_inst|lpm_counter_component|auto_generated|counter_cella0~COUT  & \fenpin_inst|lpm_counter_component|auto_generated|counter_cella3~COUTCOUT1 ), GLOBAL(\clkin~combout ), VCC, 
// , , \~GND , , , \fenpin_inst|lpm_counter_component|auto_generated|modulus_trigger )
// \fenpin_inst|lpm_counter_component|auto_generated|counter_cella4~COUT  = CARRY(\fenpin_inst|lpm_counter_component|auto_generated|safe_q [4] & !\fenpin_inst|lpm_counter_component|auto_generated|counter_cella3~COUT )
// \fenpin_inst|lpm_counter_component|auto_generated|counter_cella4~COUTCOUT1  = CARRY(\fenpin_inst|lpm_counter_component|auto_generated|safe_q [4] & !\fenpin_inst|lpm_counter_component|auto_generated|counter_cella3~COUTCOUT1 )

	.clk(\clkin~combout ),
	.dataa(vcc),
	.datab(\fenpin_inst|lpm_counter_component|auto_generated|safe_q [4]),
	.datac(\~GND ),
	.datad(vcc),
	.aclr(gnd),
	.aload(gnd),
	.sclr(gnd),
	.sload(\fenpin_inst|lpm_counter_component|auto_generated|modulus_trigger ),
	.ena(vcc),
	.cin(\fenpin_inst|lpm_counter_component|auto_generated|counter_cella0~COUT ),
	.cin0(\fenpin_inst|lpm_counter_component|auto_generated|counter_cella3~COUT ),
	.cin1(\fenpin_inst|lpm_counter_component|auto_generated|counter_cella3~COUTCOUT1 ),
	.inverta(gnd),
	.regcascin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(\fenpin_inst|lpm_counter_component|auto_generated|safe_q [4]),
12345

secondwatch.vo - 源码说明

本页面展示了「用VERILOG实现的秒表 用VERILOG实现的秒表」中的 secondwatch.vo 源码文件，采用 VO 编程语言编写，共 1,120 行代码。您可以在线阅读完整代码内容，也可以返回资源详情页下载完整源码包进行本地学习和开发。

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