📄 secondwatch.map.rpt
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Warning (10034): Output port "usb_addr[7]" at TOP_FD_III.v(63) has no driver
Warning (10034): Output port "usb_addr[6]" at TOP_FD_III.v(63) has no driver
Warning (10034): Output port "usb_addr[5]" at TOP_FD_III.v(63) has no driver
Warning (10034): Output port "usb_addr[4]" at TOP_FD_III.v(63) has no driver
Warning (10034): Output port "usb_addr[3]" at TOP_FD_III.v(63) has no driver
Warning (10034): Output port "usb_addr[2]" at TOP_FD_III.v(63) has no driver
Warning (10034): Output port "usb_addr[1]" at TOP_FD_III.v(63) has no driver
Warning (10034): Output port "usb_addr[0]" at TOP_FD_III.v(63) has no driver
Warning (10034): Output port "usb_rst_n" at TOP_FD_III.v(67) has no driver
Warning (10034): Output port "usb_cs_n" at TOP_FD_III.v(68) has no driver
Warning (10034): Output port "usb_rd_n" at TOP_FD_III.v(69) has no driver
Warning (10034): Output port "usb_wr_n" at TOP_FD_III.v(72) has no driver
Warning: Using design file fenpin.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project
Info: Found entity 1: fenpin
Info: Elaborating entity "fenpin" for hierarchy "fenpin:fenpin_inst"
Info: Found 1 design units, including 1 entities, in source file ../../program files/altera/70/quartus/libraries/megafunctions/lpm_counter.tdf
Info: Found entity 1: lpm_counter
Info: Elaborating entity "lpm_counter" for hierarchy "fenpin:fenpin_inst|lpm_counter:lpm_counter_component"
Info: Elaborated megafunction instantiation "fenpin:fenpin_inst|lpm_counter:lpm_counter_component"
Info: Found 1 design units, including 1 entities, in source file db/cntr_mdj.tdf
Info: Found entity 1: cntr_mdj
Info: Elaborating entity "cntr_mdj" for hierarchy "fenpin:fenpin_inst|lpm_counter:lpm_counter_component|cntr_mdj:auto_generated"
Info: Elaborating entity "rlshifter" for hierarchy "rlshifter:rlshifter_sl"
Info: Elaborating entity "fpcount" for hierarchy "fpcount:fpcount_sl"
Warning (10230): Verilog HDL assignment warning at 8count.v(18): truncated value with size 32 to match size of target (8)
Warning (10230): Verilog HDL assignment warning at 8count.v(23): truncated value with size 32 to match size of target (8)
Info: Elaborating entity "mux" for hierarchy "mux:mux_sl"
Info (10264): Verilog HDL Case Statement information at 4mux.v(9): all case item expressions in this case statement are onehot
Info: Elaborating entity "decode4_7" for hierarchy "decode4_7:decode4_7_sl"
Warning (10270): Verilog HDL Case Statement warning at 7seg.v(9): incomplete case statement has no default case item
Warning (10240): Verilog HDL Always Construct warning at 7seg.v(7): inferring latch(es) for variable "seg", which holds its previous value in one or more paths through the always construct
Info (10041): Verilog HDL or VHDL info at 7seg.v(9): inferred latch for "seg[6]"
Info (10041): Verilog HDL or VHDL info at 7seg.v(9): inferred latch for "seg[5]"
Info (10041): Verilog HDL or VHDL info at 7seg.v(9): inferred latch for "seg[4]"
Info (10041): Verilog HDL or VHDL info at 7seg.v(9): inferred latch for "seg[3]"
Info (10041): Verilog HDL or VHDL info at 7seg.v(9): inferred latch for "seg[2]"
Info (10041): Verilog HDL or VHDL info at 7seg.v(9): inferred latch for "seg[1]"
Info (10041): Verilog HDL or VHDL info at 7seg.v(9): inferred latch for "seg[0]"
Info: Elaborating entity "jscount" for hierarchy "jscount:jscount_sl"
Warning (10230): Verilog HDL assignment warning at 16count2.v(13): truncated value with size 32 to match size of target (16)
Warning (10230): Verilog HDL assignment warning at 16count2.v(16): truncated value with size 32 to match size of target (16)
Warning (10230): Verilog HDL assignment warning at 16count2.v(19): truncated value with size 32 to match size of target (16)
Warning (10230): Verilog HDL assignment warning at 16count2.v(22): truncated value with size 32 to match size of target (16)
Warning: Port "out1" on the entity instantiation of "jscount_sl" is connected to a signal of width 1. The formal width of the signal in the module is 4. Extra bits will be left dangling without any fanout logic.
Warning: Port "out2" on the entity instantiation of "jscount_sl" is connected to a signal of width 1. The formal width of the signal in the module is 4. Extra bits will be left dangling without any fanout logic.
Warning: Port "out3" on the entity instantiation of "jscount_sl" is connected to a signal of width 1. The formal width of the signal in the module is 4. Extra bits will be left dangling without any fanout logic.
Warning: Port "out4" on the entity instantiation of "jscount_sl" is connected to a signal of width 1. The formal width of the signal in the module is 4. Extra bits will be left dangling without any fanout logic.
Warning: Port "seg" on the entity instantiation of "decode4_7_sl" is connected to a signal of width 8. The formal width of the signal in the module is 7. Extra bits will be left dangling without any fanout logic.
Warning: Port "in1" on the entity instantiation of "mux_sl" is connected to a signal of width 1. The formal width of the signal in the module is 4. Extra bits will be driven by GND.
Warning: Port "in2" on the entity instantiation of "mux_sl" is connected to a signal of width 1. The formal width of the signal in the module is 4. Extra bits will be driven by GND.
Warning: Port "in3" on the entity instantiation of "mux_sl" is connected to a signal of width 1. The formal width of the signal in the module is 4. Extra bits will be driven by GND.
Warning: Port "in4" on the entity instantiation of "mux_sl" is connected to a signal of width 1. The formal width of the signal in the module is 4. Extra bits will be driven by GND.
Warning: Reduced register "rlshifter:rlshifter_sl|q[2]" with stuck data_in port to stuck value GND
Warning: Reduced register "rlshifter:rlshifter_sl|q[3]" with stuck data_in port to stuck value GND
Warning: Reduced register "rlshifter:rlshifter_sl|q[0]" with stuck data_in port to stuck value GND
Warning: Reduced register "rlshifter:rlshifter_sl|q[1]" with stuck data_in port to stuck value GND
Warning: LATCH primitive "decode4_7:decode4_7_sl|seg[5]" is permanently enabled
Warning: LATCH primitive "decode4_7:decode4_7_sl|seg[4]" is permanently enabled
Warning: LATCH primitive "decode4_7:decode4_7_sl|seg[3]" is permanently enabled
Warning: LATCH primitive "decode4_7:decode4_7_sl|seg[0]" is permanently enabled
Warning: LATCH primitive "decode4_7:decode4_7_sl|seg[5]" is permanently enabled
Warning: LATCH primitive "decode4_7:decode4_7_sl|seg[4]" is permanently enabled
Warning: LATCH primitive "decode4_7:decode4_7_sl|seg[3]" is permanently enabled
Warning: LATCH primitive "decode4_7:decode4_7_sl|seg[0]" is permanently enabled
Warning: Output pins are stuck at VCC or GND
Warning: Pin "led[7]" stuck at VCC
Warning: Pin "led[6]" stuck at VCC
Warning: Pin "led[5]" stuck at VCC
Warning: Pin "led[4]" stuck at VCC
Warning: Pin "led[3]" stuck at VCC
Warning: Pin "led[2]" stuck at VCC
Warning: Pin "led[1]" stuck at VCC
Warning: Pin "led[0]" stuck at VCC
Warning: Pin "seven[1]" stuck at VCC
Warning: Pin "seven[2]" stuck at VCC
Warning: Pin "seven[6]" stuck at GND
Warning: Pin "seven[7]" stuck at GND
Warning: Pin "seven_sel[3]" stuck at VCC
Warning: Pin "seven_sel[2]" stuck at VCC
Warning: Pin "seven_sel[1]" stuck at VCC
Warning: Pin "seven_sel[0]" stuck at VCC
Warning: Pin "mem_addr[0]" stuck at GND
Warning: Pin "mem_addr[1]" stuck at GND
Warning: Pin "mem_addr[2]" stuck at GND
Warning: Pin "mem_addr[3]" stuck at GND
Warning: Pin "mem_addr[4]" stuck at GND
Warning: Pin "mem_addr[5]" stuck at GND
Warning: Pin "mem_addr[6]" stuck at GND
Warning: Pin "mem_addr[7]" stuck at GND
Warning: Pin "mem_addr[8]" stuck at GND
Warning: Pin "mem_addr[9]" stuck at GND
Warning: Pin "mem_addr[10]" stuck at GND
Warning: Pin "mem_addr[11]" stuck at GND
Warning: Pin "mem_addr[12]" stuck at GND
Warning: Pin "mem_addr[13]" stuck at GND
Warning: Pin "mem_addr[14]" stuck at GND
Warning: Pin "mem_addr[15]" stuck at GND
Warning: Pin "mem_addr[16]" stuck at GND
Warning: Pin "mem_addr[17]" stuck at GND
Warning: Pin "mem_addr[18]" stuck at GND
Warning: Pin "mem_addr[19]" stuck at GND
Warning: Pin "mem_addr[20]" stuck at GND
Warning: Pin "sram_be[0]" stuck at GND
Warning: Pin "sram_be[1]" stuck at GND
Warning: Pin "sram_rd" stuck at GND
Warning: Pin "sram_wr" stuck at GND
Warning: Pin "sram_sel" stuck at GND
Warning: Pin "flash_oe" stuck at VCC
Warning: Pin "flash_we" stuck at GND
Warning: Pin "flash_cs" stuck at VCC
Warning: Pin "lcd_cs1" stuck at GND
Warning: Pin "lcd_cs2" stuck at GND
Warning: Pin "lcd_di" stuck at GND
Warning: Pin "lcd_e" stuck at GND
Warning: Pin "lcd_reset" stuck at GND
Warning: Pin "lcd_rw" stuck at GND
Warning: Pin "ps2_clk" stuck at GND
Warning: Pin "ps2_data" stuck at GND
Warning: Pin "ps2_2_clk" stuck at GND
Warning: Pin "ps2_2_data" stuck at GND
Warning: Pin "txd" stuck at GND
Warning: Pin "txd_2" stuck at GND
Warning: Pin "motor_pwm" stuck at GND
Warning: Pin "da_a0" stuck at GND
Warning: Pin "da_a1" stuck at GND
Warning: Pin "da_data[0]" stuck at GND
Warning: Pin "da_data[1]" stuck at GND
Warning: Pin "da_data[2]" stuck at GND
Warning: Pin "da_data[3]" stuck at GND
Warning: Pin "da_data[4]" stuck at GND
Warning: Pin "da_data[5]" stuck at GND
Warning: Pin "da_data[6]" stuck at GND
Warning: Pin "da_data[7]" stuck at GND
Warning: Pin "da_ldac_n" stuck at GND
Warning: Pin "da_wr_n" stuck at GND
Warning: Pin "ad_convst_n" stuck at GND
Warning: Pin "ad_sclk" stuck at GND
Warning: Pin "ad_din" stuck at GND
Warning: Pin "ad_rfs" stuck at GND
Warning: Pin "ad_tfs" stuck at GND
Warning: Pin "usb_addr[0]" stuck at GND
Warning: Pin "usb_addr[1]" stuck at GND
Warning: Pin "usb_addr[2]" stuck at GND
Warning: Pin "usb_addr[3]" stuck at GND
Warning: Pin "usb_addr[4]" stuck at GND
Warning: Pin "usb_addr[5]" stuck at GND
Warning: Pin "usb_addr[6]" stuck at GND
Warning: Pin "usb_addr[7]" stuck at GND
Warning: Pin "usb_rst_n" stuck at GND
Warning: Pin "usb_cs_n" stuck at GND
Warning: Pin "usb_rd_n" stuck at GND
Warning: Pin "usb_wr_n" stuck at GND
Info: 12 registers lost all their fanouts during netlist optimizations. The first 12 are displayed below.
Info: Register "jscount_sl/count[12]" lost all its fanouts during netlist optimizations.
Info: Register "jscount_sl/count[13]" lost all its fanouts during netlist optimizations.
Info: Register "jscount_sl/count[14]" lost all its fanouts during netlist optimizations.
Info: Register "jscount_sl/count[15]" lost all its fanouts during netlist optimizations.
Info: Register "jscount_sl/count[4]" lost all its fanouts during netlist optimizations.
Info: Register "jscount_sl/count[5]" lost all its fanouts during netlist optimizations.
Info: Register "jscount_sl/count[6]" lost all its fanouts during netlist optimizations.
Info: Register "jscount_sl/count[7]" lost all its fanouts during netlist optimizations.
Info: Register "jscount_sl/count[8]" lost all its fanouts during netlist optimizations.
Info: Register "jscount_sl/count[9]" lost all its fanouts during netlist optimizations.
Info: Register "jscount_sl/count[10]" lost all its fanouts during netlist optimizations.
Info: Register "jscount_sl/count[11]" lost all its fanouts during netlist optimizations.
Info: Implemented 238 device resources after synthesis - the final resource count might be different
Info: Implemented 21 input pins
Info: Implemented 91 output pins
Info: Implemented 80 bidirectional pins
Info: Implemented 46 logic cells
Info: Quartus II Analysis & Synthesis was successful. 0 errors, 189 warnings
Info: Allocated 128 megabytes of memory during processing
Info: Processing ended: Sat Jun 14 12:38:27 2008
Info: Elapsed time: 00:00:03
+------------------------------------------+
; Analysis & Synthesis Suppressed Messages ;
+------------------------------------------+
The suppressed messages can be found in D:/MYPROGRAM/secondwatch/secondwatch.map.smsg.
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