prev_cmp_adder8.qmsg

8位加法器的实现

{ "Warning" "WFIOMGR_PINS_MISSING_LOCATION_INFO" "25 25 " "Warning: No exact pin location assignment(s) for 25 pins of 25 total pins" { { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "COUT " "Info: Pin COUT not assigned to an exact location on the device" {  } { { "d:/altera/72/quartus/bin/pin_planner.ppl" "" { PinPlanner "d:/altera/72/quartus/bin/pin_planner.ppl" { COUT } } } { "adder8.bdf" "" { Schematic "e:/fpga/ex/bdf/adder8.bdf" { { 392 480 656 408 "COUT" "" } } } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { COUT } "NODE_NAME" } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { COUT } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "SUM\[7\] " "Info: Pin SUM\[7\] not assigned to an exact location on the device" {  } { { "d:/altera/72/quartus/bin/pin_planner.ppl" "" { PinPlanner "d:/altera/72/quartus/bin/pin_planner.ppl" { SUM[7] } } } { "adder8.bdf" "" { Schematic "e:/fpga/ex/bdf/adder8.bdf" { { 48 352 528 64 "SUM\[7..4\]" "" } { 0 352 528 16 "SUM\[3..0\]" "" } { 192 280 324 208 "SUM\[0\]" "" } { 208 280 324 224 "SUM\[1\]" "" } { 224 280 324 240 "SUM\[2\]" "" } { 240 280 324 256 "SUM\[3\]" "" } { 192 512 556 208 "SUM\[4\]" "" } { 208 512 556 224 "SUM\[5\]" "" } { 224 512 556 240 "SUM\[6\]" "" } { 240 512 556 256 "SUM\[7\]" "" } } } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { SUM[7] } "NODE_NAME" } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { SUM[7] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "SUM\[6\] " "Info: Pin SUM\[6\] not assigned to an exact location on the device" {  } { { "d:/altera/72/quartus/bin/pin_planner.ppl" "" { PinPlanner "d:/altera/72/quartus/bin/pin_planner.ppl" { SUM[6] } } } { "adder8.bdf" "" { Schematic "e:/fpga/ex/bdf/adder8.bdf" { { 48 352 528 64 "SUM\[7..4\]" "" } { 0 352 528 16 "SUM\[3..0\]" "" } { 192 280 324 208 "SUM\[0\]" "" } { 208 280 324 224 "SUM\[1\]" "" } { 224 280 324 240 "SUM\[2\]" "" } { 240 280 324 256 "SUM\[3\]" "" } { 192 512 556 208 "SUM\[4\]" "" } { 208 512 556 224 "SUM\[5\]" "" } { 224 512 556 240 "SUM\[6\]" "" } { 240 512 556 256 "SUM\[7\]" "" } } } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { SUM[6] } "NODE_NAME" } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { SUM[6] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "SUM\[5\] " "Info: Pin SUM\[5\] not assigned to an exact location on the device" {  } { { "d:/altera/72/quartus/bin/pin_planner.ppl" "" { PinPlanner "d:/altera/72/quartus/bin/pin_planner.ppl" { SUM[5] } } } { "adder8.bdf" "" { Schematic "e:/fpga/ex/bdf/adder8.bdf" { { 48 352 528 64 "SUM\[7..4\]" "" } { 0 352 528 16 "SUM\[3..0\]" "" } { 192 280 324 208 "SUM\[0\]" "" } { 208 280 324 224 "SUM\[1\]" "" } { 224 280 324 240 "SUM\[2\]" "" } { 240 280 324 256 "SUM\[3\]" "" } { 192 512 556 208 "SUM\[4\]" "" } { 208 512 556 224 "SUM\[5\]" "" } { 224 512 556 240 "SUM\[6\]" "" } { 240 512 556 256 "SUM\[7\]" "" } } } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { SUM[5] } "NODE_NAME" } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { SUM[5] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "SUM\[4\] " "Info: Pin SUM\[4\] not assigned to an exact location on the device" {  } { { "d:/altera/72/quartus/bin/pin_planner.ppl" "" { PinPlanner "d:/altera/72/quartus/bin/pin_planner.ppl" { SUM[4] } } } { "adder8.bdf" "" { Schematic "e:/fpga/ex/bdf/adder8.bdf" { { 48 352 528 64 "SUM\[7..4\]" "" } { 0 352 528 16 "SUM\[3..0\]" "" } { 192 280 324 208 "SUM\[0\]" "" } { 208 280 324 224 "SUM\[1\]" "" } { 224 280 324 240 "SUM\[2\]" "" } { 240 280 324 256 "SUM\[3\]" "" } { 192 512 556 208 "SUM\[4\]" "" } { 208 512 556 224 "SUM\[5\]" "" } { 224 512 556 240 "SUM\[6\]" "" } { 240 512 556 256 "SUM\[7\]" "" } } } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { SUM[4] } "NODE_NAME" } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { SUM[4] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "SUM\[3\] " "Info: Pin SUM\[3\] not assigned to an exact location on the device" {  } { { "d:/altera/72/quartus/bin/pin_planner.ppl" "" { PinPlanner "d:/altera/72/quartus/bin/pin_planner.ppl" { SUM[3] } } } { "adder8.bdf" "" { Schematic "e:/fpga/ex/bdf/adder8.bdf" { { 48 352 528 64 "SUM\[7..4\]" "" } { 0 352 528 16 "SUM\[3..0\]" "" } { 192 280 324 208 "SUM\[0\]" "" } { 208 280 324 224 "SUM\[1\]" "" } { 224 280 324 240 "SUM\[2\]" "" } { 240 280 324 256 "SUM\[3\]" "" } { 192 512 556 208 "SUM\[4\]" "" } { 208 512 556 224 "SUM\[5\]" "" } { 224 512 556 240 "SUM\[6\]" "" } { 240 512 556 256 "SUM\[7\]" "" } } } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { SUM[3] } "NODE_NAME" } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { SUM[3] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "SUM\[2\] " "Info: Pin SUM\[2\] not assigned to an exact location on the device" {  } { { "d:/altera/72/quartus/bin/pin_planner.ppl" "" { PinPlanner "d:/altera/72/quartus/bin/pin_planner.ppl" { SUM[2] } } } { "adder8.bdf" "" { Schematic "e:/fpga/ex/bdf/adder8.bdf" { { 48 352 528 64 "SUM\[7..4\]" "" } { 0 352 528 16 "SUM\[3..0\]" "" } { 192 280 324 208 "SUM\[0\]" "" } { 208 280 324 224 "SUM\[1\]" "" } { 224 280 324 240 "SUM\[2\]" "" } { 240 280 324 256 "SUM\[3\]" "" } { 192 512 556 208 "SUM\[4\]" "" } { 208 512 556 224 "SUM\[5\]" "" } { 224 512 556 240 "SUM\[6\]" "" } { 240 512 556 256 "SUM\[7\]" "" } } } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { SUM[2] } "NODE_NAME" } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { SUM[2] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "SUM\[1\] " "Info: Pin SUM\[1\] not assigned to an exact location on the device" {  } { { "d:/altera/72/quartus/bin/pin_planner.ppl" "" { PinPlanner "d:/altera/72/quartus/bin/pin_planner.ppl" { SUM[1] } } } { "adder8.bdf" "" { Schematic "e:/fpga/ex/bdf/adder8.bdf" { { 48 352 528 64 "SUM\[7..4\]" "" } { 0 352 528 16 "SUM\[3..0\]" "" } { 192 280 324 208 "SUM\[0\]" "" } { 208 280 324 224 "SUM\[1\]" "" } { 224 280 324 240 "SUM\[2\]" "" } { 240 280 324 256 "SUM\[3\]" "" } { 192 512 556 208 "SUM\[4\]" "" } { 208 512 556 224 "SUM\[5\]" "" } { 224 512 556 240 "SUM\[6\]" "" } { 240 512 556 256 "SUM\[7\]" "" } } } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { SUM[1] } "NODE_NAME" } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { SUM[1] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "SUM\[0\] " "Info: Pin SUM\[0\] not assigned to an exact location on the device" {  } { { "d:/altera/72/quartus/bin/pin_planner.ppl" "" { PinPlanner "d:/altera/72/quartus/bin/pin_planner.ppl" { SUM[0] } } } { "adder8.bdf" "" { Schematic "e:/fpga/ex/bdf/adder8.bdf" { { 48 352 528 64 "SUM\[7..4\]" "" } { 0 352 528 16 "SUM\[3..0\]" "" } { 192 280 324 208 "SUM\[0\]" "" } { 208 280 324 224 "SUM\[1\]" "" } { 224 280 324 240 "SUM\[2\]" "" } { 240 280 324 256 "SUM\[3\]" "" } { 192 512 556 208 "SUM\[4\]" "" } { 208 512 556 224 "SUM\[5\]" "" } { 224 512 556 240 "SUM\[6\]" "" } { 240 512 556 256 "SUM\[7\]" "" } } } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { SUM[0] } "NODE_NAME" } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { SUM[0] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "A\[7\] " "Info: Pin A\[7\] not assigned to an exact location on the device" {  } { { "d:/altera/72/quartus/bin/pin_planner.ppl" "" { PinPlanner "d:/altera/72/quartus/bin/pin_planner.ppl" { A[7] } } } { "adder8.bdf" "" { Schematic "e:/fpga/ex/bdf/adder8.bdf" { { -8 16 184 8 "A\[3..0\]" "" } { 16 16 184 32 "A\[7..4\]" "" } { 176 152 176 192 "A\[0\]" "" } { 208 152 180 224 "A\[1\]" "" } { 240 152 176 256 "A\[2\]" "" } { 272 152 180 288 "A\[3\]" "" } { 176 392 420 192 "A\[4\]" "" } { 208 392 420 224 "A\[5\]" "" } { 240 392 420 256 "A\[6\]" "" } { 272 392 420 288 "A\[7\]" "" } } } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { A[7] } "NODE_NAME" } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { A[7] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "B\[7\] " "Info: Pin B\[7\] not assigned to an exact location on the device" {  } { { "d:/altera/72/quartus/bin/pin_planner.ppl" "" { PinPlanner "d:/altera/72/quartus/bin/pin_planner.ppl" { B[7] } } } { "adder8.bdf" "" { Schematic "e:/fpga/ex/bdf/adder8.bdf" { { 32 16 184 48 "B\[3..0\]" "" } { 48 16 184 64 "B\[7..4\]" "" } { 192 150 176 208 "B\[0\]" "" } { 224 152 176 240 "B\[1\]" "" } { 256 152 176 272 "B\[2\]" "" } { 288 152 180 304 "B\[3\]" "" } { 192 392 420 208 "B\[4\]" "" } { 224 392 420 240 "B\[5\]" "" } { 256 392 420 272 "B\[6\]" "" } { 288 392 420 304 "B\[7\]" "" } } } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { B[7] } "NODE_NAME" } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { B[7] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "A\[6\] " "Info: Pin A\[6\] not assigned to an exact location on the device" {  } { { "d:/altera/72/quartus/bin/pin_planner.ppl" "" { PinPlanner "d:/altera/72/quartus/bin/pin_planner.ppl" { A[6] } } } { "adder8.bdf" "" { Schematic "e:/fpga/ex/bdf/adder8.bdf" { { -8 16 184 8 "A\[3..0\]" "" } { 16 16 184 32 "A\[7..4\]" "" } { 176 152 176 192 "A\[0\]" "" } { 208 152 180 224 "A\[1\]" "" } { 240 152 176 256 "A\[2\]" "" } { 272 152 180 288 "A\[3\]" "" } { 176 392 420 192 "A\[4\]" "" } { 208 392 420 224 "A\[5\]" "" } { 240 392 420 256 "A\[6\]" "" } { 272 392 420 288 "A\[7\]" "" } } } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { A[6] } "NODE_NAME" } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { A[6] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "B\[6\] " "Info: Pin B\[6\] not assigned to an exact location on the device" {  } { { "d:/altera/72/quartus/bin/pin_planner.ppl" "" { PinPlanner "d:/altera/72/quartus/bin/pin_planner.ppl" { B[6] } } } { "adder8.bdf" "" { Schematic "e:/fpga/ex/bdf/adder8.bdf" { { 32 16 184 48 "B\[3..0\]" "" } { 48 16 184 64 "B\[7..4\]" "" } { 192 150 176 208 "B\[0\]" "" } { 224 152 176 240 "B\[1\]" "" } { 256 152 176 272 "B\[2\]" "" } { 288 152 180 304 "B\[3\]" "" } { 192 392 420 208 "B\[4\]" "" } { 224 392 420 240 "B\[5\]" "" } { 256 392 420 272 "B\[6\]" "" } { 288 392 420 304 "B\[7\]" "" } } } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { B[6] } "NODE_NAME" } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { B[6] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "A\[5\] " "Info: Pin A\[5\] not assigned to an exact location on the device" {  } { { "d:/altera/72/quartus/bin/pin_planner.ppl" "" { PinPlanner "d:/altera/72/quartus/bin/pin_planner.ppl" { A[5] } } } { "adder8.bdf" "" { Schematic "e:/fpga/ex/bdf/adder8.bdf" { { -8 16 184 8 "A\[3..0\]" "" } { 16 16 184 32 "A\[7..4\]" "" } { 176 152 176 192 "A\[0\]" "" } { 208 152 180 224 "A\[1\]" "" } { 240 152 176 256 "A\[2\]" "" } { 272 152 180 288 "A\[3\]" "" } { 176 392 420 192 "A\[4\]" "" } { 208 392 420 224 "A\[5\]" "" } { 240 392 420 256 "A\[6\]" "" } { 272 392 420 288 "A\[7\]" "" } } } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { A[5] } "NODE_NAME" } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { A[5] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "B\[5\] " "Info: Pin B\[5\] not assigned to an exact location on the device" {  } { { "d:/altera/72/quartus/bin/pin_planner.ppl" "" { PinPlanner "d:/altera/72/quartus/bin/pin_planner.ppl" { B[5] } } } { "adder8.bdf" "" { Schematic "e:/fpga/ex/bdf/adder8.bdf" { { 32 16 184 48 "B\[3..0\]" "" } { 48 16 184 64 "B\[7..4\]" "" } { 192 150 176 208 "B\[0\]" "" } { 224 152 176 240 "B\[1\]" "" } { 256 152 176 272 "B\[2\]" "" } { 288 152 180 304 "B\[3\]" "" } { 192 392 420 208 "B\[4\]" "" } { 224 392 420 240 "B\[5\]" "" } { 256 392 420 272 "B\[6\]" "" } { 288 392 420 304 "B\[7\]" "" } } } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { B[5] } "NODE_NAME" } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { B[5] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "A\[4\] " "Info: Pin A\[4\] not assigned to an exact location on the device" {  } { { "d:/altera/72/quartus/bin/pin_planner.ppl" "" { PinPlanner "d:/altera/72/quartus/bin/pin_planner.ppl" { A[4] } } } { "adder8.bdf" "" { Schematic "e:/fpga/ex/bdf/adder8.bdf" { { -8 16 184 8 "A\[3..0\]" "" } { 16 16 184 32 "A\[7..4\]" "" } { 176 152 176 192 "A\[0\]" "" } { 208 152 180 224 "A\[1\]" "" } { 240 152 176 256 "A\[2\]" "" } { 272 152 180 288 "A\[3\]" "" } { 176 392 420 192 "A\[4\]" "" } { 208 392 420 224 "A\[5\]" "" } { 240 392 420 256 "A\[6\]" "" } { 272 392 420 288 "A\[7\]" "" } } } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { A[4] } "NODE_NAME" } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { A[4] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "B\[4\] " "Info: Pin B\[4\] not assigned to an exact location on the device" {  } { { "d:/altera/72/quartus/bin/pin_planner.ppl" "" { PinPlanner "d:/altera/72/quartus/bin/pin_planner.ppl" { B[4] } } } { "adder8.bdf" "" { Schematic "e:/fpga/ex/bdf/adder8.bdf" { { 32 16 184 48 "B\[3..0\]" "" } { 48 16 184 64 "B\[7..4\]" "" } { 192 150 176 208 "B\[0\]" "" } { 224 152 176 240 "B\[1\]" "" } { 256 152 176 272 "B\[2\]" "" } { 288 152 180 304 "B\[3\]" "" } { 192 392 420 208 "B\[4\]" "" } { 224 392 420 240 "B\[5\]" "" } { 256 392 420 272 "B\[6\]" "" } { 288 392 420 304 "B\[7\]" "" } } } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { B[4] } "NODE_NAME" } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { B[4] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "A\[3\] " "Info: Pin A\[3\] not assigned to an exact location on the device" {  } { { "d:/altera/72/quartus/bin/pin_planner.ppl" "" { PinPlanner "d:/altera/72/quartus/bin/pin_planner.ppl" { A[3] } } } { "adder8.bdf" "" { Schematic "e:/fpga/ex/bdf/adder8.bdf" { { -8 16 184 8 "A\[3..0\]" "" } { 16 16 184 32 "A\[7..4\]" "" } { 176 152 176 192 "A\[0\]" "" } { 208 152 180 224 "A\[1\]" "" } { 240 152 176 256 "A\[2\]" "" } { 272 152 180 288 "A\[3\]" "" } { 176 392 420 192 "A\[4\]" "" } { 208 392 420 224 "A\[5\]" "" } { 240 392 420 256 "A\[6\]" "" } { 272 392 420 288 "A\[7\]" "" } } } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { A[3] } "NODE_NAME" } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { A[3] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "B\[3\] " "Info: Pin B\[3\] not assigned to an exact location on the device" {  } { { "d:/altera/72/quartus/bin/pin_planner.ppl" "" { PinPlanner "d:/altera/72/quartus/bin/pin_planner.ppl" { B[3] } } } { "adder8.bdf" "" { Schematic "e:/fpga/ex/bdf/adder8.bdf" { { 32 16 184 48 "B\[3..0\]" "" } { 48 16 184 64 "B\[7..4\]" "" } { 192 150 176 208 "B\[0\]" "" } { 224 152 176 240 "B\[1\]" "" } { 256 152 176 272 "B\[2\]" "" } { 288 152 180 304 "B\[3\]" "" } { 192 392 420 208 "B\[4\]" "" } { 224 392 420 240 "B\[5\]" "" } { 256 392 420 272 "B\[6\]" "" } { 288 392 420 304 "B\[7\]" "" } } } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { B[3] } "NODE_NAME" } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { B[3] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "A\[2\] " "Info: Pin A\[2\] not assigned to an exact location on the device" {  } { { "d:/altera/72/quartus/bin/pin_planner.ppl" "" { PinPlanner "d:/altera/72/quartus/bin/pin_planner.ppl" { A[2] } } } { "adder8.bdf" "" { Schematic "e:/fpga/ex/bdf/adder8.bdf" { { -8 16 184 8 "A\[3..0\]" "" } { 16 16 184 32 "A\[7..4\]" "" } { 176 152 176 192 "A\[0\]" "" } { 208 152 180 224 "A\[1\]" "" } { 240 152 176 256 "A\[2\]" "" } { 272 152 180 288 "A\[3\]" "" } { 176 392 420 192 "A\[4\]" "" } { 208 392 420 224 "A\[5\]" "" } { 240 392 420 256 "A\[6\]" "" } { 272 392 420 288 "A\[7\]" "" } } } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { A[2] } "NODE_NAME" } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { A[2] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "B\[2\] " "Info: Pin B\[2\] not assigned to an exact location on the device" {  } { { "d:/altera/72/quartus/bin/pin_planner.ppl" "" { PinPlanner "d:/altera/72/quartus/bin/pin_planner.ppl" { B[2] } } } { "adder8.bdf" "" { Schematic "e:/fpga/ex/bdf/adder8.bdf" { { 32 16 184 48 "B\[3..0\]" "" } { 48 16 184 64 "B\[7..4\]" "" } { 192 150 176 208 "B\[0\]" "" } { 224 152 176 240 "B\[1\]" "" } { 256 152 176 272 "B\[2\]" "" } { 288 152 180 304 "B\[3\]" "" } { 192 392 420 208 "B\[4\]" "" } { 224 392 420 240 "B\[5\]" "" } { 256 392 420 272 "B\[6\]" "" } { 288 392 420 304 "B\[7\]" "" } } } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { B[2] } "NODE_NAME" } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { B[2] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "A\[1\] " "Info: Pin A\[1\] not assigned to an exact location on the device" {  } { { "d:/altera/72/quartus/bin/pin_planner.ppl" "" { PinPlanner "d:/altera/72/quartus/bin/pin_planner.ppl" { A[1] } } } { "adder8.bdf" "" { Schematic "e:/fpga/ex/bdf/adder8.bdf" { { -8 16 184 8 "A\[3..0\]" "" } { 16 16 184 32 "A\[7..4\]" "" } { 176 152 176 192 "A\[0\]" "" } { 208 152 180 224 "A\[1\]" "" } { 240 152 176 256 "A\[2\]" "" } { 272 152 180 288 "A\[3\]" "" } { 176 392 420 192 "A\[4\]" "" } { 208 392 420 224 "A\[5\]" "" } { 240 392 420 256 "A\[6\]" "" } { 272 392 420 288 "A\[7\]" "" } } } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { A[1] } "NODE_NAME" } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { A[1] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "B\[1\] " "Info: Pin B\[1\] not assigned to an exact location on the device" {  } { { "d:/altera/72/quartus/bin/pin_planner.ppl" "" { PinPlanner "d:/altera/72/quartus/bin/pin_planner.ppl" { B[1] } } } { "adder8.bdf" "" { Schematic "e:/fpga/ex/bdf/adder8.bdf" { { 32 16 184 48 "B\[3..0\]" "" } { 48 16 184 64 "B\[7..4\]" "" } { 192 150 176 208 "B\[0\]" "" } { 224 152 176 240 "B\[1\]" "" } { 256 152 176 272 "B\[2\]" "" } { 288 152 180 304 "B\[3\]" "" } { 192 392 420 208 "B\[4\]" "" } { 224 392 420 240 "B\[5\]" "" } { 256 392 420 272 "B\[6\]" "" } { 288 392 420 304 "B\[7\]" "" } } } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { B[1] } "NODE_NAME" } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { B[1] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "A\[0\] " "Info: Pin A\[0\] not assigned to an exact location on the device" {  } { { "d:/altera/72/quartus/bin/pin_planner.ppl" "" { PinPlanner "d:/altera/72/quartus/bin/pin_planner.ppl" { A[0] } } } { "adder8.bdf" "" { Schematic "e:/fpga/ex/bdf/adder8.bdf" { { -8 16 184 8 "A\[3..0\]" "" } { 16 16 184 32 "A\[7..4\]" "" } { 176 152 176 192 "A\[0\]" "" } { 208 152 180 224 "A\[1\]" "" } { 240 152 176 256 "A\[2\]" "" } { 272 152 180 288 "A\[3\]" "" } { 176 392 420 192 "A\[4\]" "" } { 208 392 420 224 "A\[5\]" "" } { 240 392 420 256 "A\[6\]" "" } { 272 392 420 288 "A\[7\]" "" } } } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { A[0] } "NODE_NAME" } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { A[0] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "B\[0\] " "Info: Pin B\[0\] not assigned to an exact location on the device" {  } { { "d:/altera/72/quartus/bin/pin_planner.ppl" "" { PinPlanner "d:/altera/72/quartus/bin/pin_planner.ppl" { B[0] } } } { "adder8.bdf" "" { Schematic "e:/fpga/ex/bdf/adder8.bdf" { { 32 16 184 48 "B\[3..0\]" "" } { 48 16 184 64 "B\[7..4\]" "" } { 192 150 176 208 "B\[0\]" "" } { 224 152 176 240 "B\[1\]" "" } { 256 152 176 272 "B\[2\]" "" } { 288 152 180 304 "B\[3\]" "" } { 192 392 420 208 "B\[4\]" "" } { 224 392 420 240 "B\[5\]" "" } { 256 392 420 272 "B\[6\]" "" } { 288 392 420 304 "B\[7\]" "" } } } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { B[0] } "NODE_NAME" } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { B[0] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0}  } {  } 0 0 "No exact pin location assignment(s) for %1!d! pins of %2!d! total pins" 0 0 "" 0}
{ "Info" "ITDC_FITTER_TIMING_ENGINE" "Classic " "Info: Fitter is using the Classic Timing Analyzer" {  } {  } 0 0 "Fitter is using the %1!s! Timing Analyzer" 0 0 "" 0}
{ "Info" "ITAN_TDC_NO_DEFAULT_OPTIMIZATION_GOALS" "" "Info: Timing requirements not specified -- quality metrics such as performance and power consumption may be sacrificed to reduce compilation time." {  } {  } 0 0 "Timing requirements not specified -- quality metrics such as performance and power consumption may be sacrificed to reduce compilation time." 0 0 "" 0}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_START_REGPACKING_INFO" "" "Info: Starting register packing" {  } {  } 0 0 "Starting register packing" 0 0 "" 0}
{ "Extra Info" "IFSAC_FSAC_START_REG_LOCATION_PROCESSING" "" "Extra Info: Performing register packing on registers with non-logic cell location assignments" {  } {  } 1 0 "Performing register packing on registers with non-logic cell location assignments" 1 0 "" 0}
{ "Extra Info" "IFSAC_FSAC_FINISH_REG_LOCATION_PROCESSING" "" "Extra Info: Completed register packing on registers with non-logic cell location assignments" {  } {  } 1 0 "Completed register packing on registers with non-logic cell location assignments" 1 0 "" 0}
{ "Extra Info" "IFSAC_FSAC_REGISTER_PACKING_BEGIN_FAST_REGISTER_INFO" "" "Extra Info: Started Fast Input/Output/OE register processing" {  } {  } 1 0 "Started Fast Input/Output/OE register processing" 1 0 "" 0}
{ "Extra Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_FAST_REGISTER_INFO" "" "Extra Info: Finished Fast Input/Output/OE register processing" {  } {  } 1 0 "Finished Fast Input/Output/OE register processing" 1 0 "" 0}
{ "Extra Info" "IFSAC_FSAC_START_IO_MAC_RAM_PACKING" "" "Extra Info: Moving registers into I/O cells, DSP blocks, and RAM blocks to improve timing and density" {  } {  } 1 0 "Moving registers into I/O cells, DSP blocks, and RAM blocks to improve timing and density" 1 0 "" 0}
{ "Extra Info" "IFSAC_FSAC_FINISH_IO_MAC_RAM_PACKING" "" "Extra Info: Finished moving registers into I/O cells, DSP blocks, and RAM blocks" {  } {  } 1 0 "Finished moving registers into I/O cells, DSP blocks, and RAM blocks" 1 0 "" 0}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_REGPACKING_INFO" "00:00:00 " "Info: Finished register packing: elapsed time is 00:00:00" { { "Extra Info" "IFSAC_NO_REGISTERS_WERE_PACKED" "" "Extra Info: No registers were packed into other blocks" {  } {  } 1 0 "No registers were packed into other blocks" 0 0 "" 0}  } {  } 0 0 "Finished register packing: elapsed time is %1!s!" 0 0 "" 0}
{ "Info" "IFSAC_FSAC_IO_BANK_PIN_GROUP_STATISTICS" "I/O pins that need to be placed that use the same VCCIO and VREF, before I/O pin placement " "Info: Statistics of I/O pins that need to be placed that use the same VCCIO and VREF, before I/O pin placement" { { "Info" "IFSAC_FSAC_SINGLE_IOC_GROUP_STATISTICS" "25 unused 3.30 16 9 0 " "Info: Number of I/O pins in group: 25 (unused VREF, 3.30 VCCIO, 16 input, 9 output, 0 bidirectional)" { { "Info" "IFSAC_FSAC_IO_STDS_IN_IOC_GROUP" "3.3-V LVTTL. " "Info: I/O standards used: 3.3-V LVTTL." {  } {  } 0 0 "I/O standards used: %1!s!" 0 0 "" 0}  } {  } 0 0 "Number of I/O pins in group: %1!d! (%2!s! VREF, %3!s! VCCIO, %4!d! input, %5!d! output, %6!d! bidirectional)" 0 0 "" 0}  } {  } 0 0 "Statistics of %1!s!" 0 0 "" 0}
{ "Info" "IFSAC_FSAC_IO_STATS_BEFORE_AFTER_PLACEMENT" "before " "Info: I/O bank details before I/O pin placement" { { "Info" "IFSAC_FSAC_IO_BANK_PIN_GROUP_STATISTICS" "I/O banks " "Info: Statistics of I/O banks" { { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "1 does not use undetermined 0 40 " "Info: I/O bank number 1 does not use VREF pins and has undetermined VCCIO pins. 0 total pin(s) used --  40 pins available" {  } {  } 0 0 "I/O bank number %1!s! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used --  %5!d! pins available" 0 0 "" 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "2 does not use undetermined 0 44 " "Info: I/O bank number 2 does not use VREF pins and has undetermined VCCIO pins. 0 total pin(s) used --  44 pins available" {  } {  } 0 0 "I/O bank number %1!s! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used --  %5!d! pins available" 0 0 "" 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "3 does not use undetermined 1 51 " "Info: I/O bank number 3 does not use VREF pins and has undetermined VCCIO pins. 1 total pin(s) used --  51 pins available" {  } {  } 0 0 "I/O bank number %1!s! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used --  %5!d! pins available" 0 0 "" 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "4 does not use undetermined 0 42 " "Info: I/O bank number 4 does not use VREF pins and has undetermined VCCIO pins. 0 total pin(s) used --  42 pins available" {  } {  } 0 0 "I/O bank number %1!s! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used --  %5!d! pins available" 0 0 "" 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "5 does not use undetermined 0 44 " "Info: I/O bank number 5 does not use VREF pins and has undetermined VCCIO pins. 0 total pin(s) used --  44 pins available" {  } {  } 0 0 "I/O bank number %1!s! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used --  %5!d! pins available" 0 0 "" 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "6 does not use undetermined 0 40 " "Info: I/O bank number 6 does not use VREF pins and has undetermined VCCIO pins. 0 total pin(s) used --  40 pins available" {  } {  } 0 0 "I/O bank number %1!s! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used --  %5!d! pins available" 0 0 "" 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "7 does not use undetermined 0 42 " "Info: I/O bank number 7 does not use VREF pins and has undetermined VCCIO pins. 0 total pin(s) used --  42 pins available" {  } {  } 0 0 "I/O bank number %1!s! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used --  %5!d! pins available" 0 0 "" 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "8 does not use undetermined 0 50 " "Info: I/O bank number 8 does not use VREF pins and has undetermined VCCIO pins. 0 total pin(s) used --  50 pins available" {  } {  } 0 0 "I/O bank number %1!s! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used --  %5!d! pins available" 0 0 "" 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "9 does not use undetermined 0 6 " "Info: I/O bank number 9 does not use VREF pins and has undetermined VCCIO pins. 0 total pin(s) used --  6 pins available" {  } {  } 0 0 "I/O bank number %1!s! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used --  %5!d! pins available" 0 0 "" 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "10 does not use undetermined 0 6 " "Info: I/O bank number 10 does not use VREF pins and has undetermined VCCIO pins. 0 total pin(s) used --  6 pins available" {  } {  } 0 0 "I/O bank number %1!s! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used --  %5!d! pins available" 0 0 "" 0}  } {  } 0 0 "Statistics of %1!s!" 0 0 "" 0}  } {  } 0 0 "I/O bank details %1!s! I/O pin placement" 0 0 "" 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_START" "" "Info: Fitter placement preparation operations beginning" {  } {  } 0 0 "Fitter placement preparation operations beginning" 0 0 "" 0}