main.tan.qmsg

这是一个用verilog语言设计的数字频率及的源代码

{ "Info" "ITAN_SCC_LOOP" "1 " "Info: Found combinational loop of 1 nodes" { { "Info" "ITAN_SCC_NODE" "dispdecoder:inst5\|data_out\[2\]~166 " "Info: Node \"dispdecoder:inst5\|data_out\[2\]~166\"" {  } { { "dispdecoder.v" "" { Text "E:/戴仙金/资料/Verilog书/源代码/cymometer/main/dispdecoder.v" 9 -1 0 } }  } 0}  } { { "dispdecoder.v" "" { Text "E:/戴仙金/资料/Verilog书/源代码/cymometer/main/dispdecoder.v" 9 -1 0 } }  } 0}
{ "Info" "ITAN_SCC_LOOP" "1 " "Info: Found combinational loop of 1 nodes" { { "Info" "ITAN_SCC_NODE" "dispdecoder:inst5\|data_out\[3\]~162 " "Info: Node \"dispdecoder:inst5\|data_out\[3\]~162\"" {  } { { "dispdecoder.v" "" { Text "E:/戴仙金/资料/Verilog书/源代码/cymometer/main/dispdecoder.v" 9 -1 0 } }  } 0}  } { { "dispdecoder.v" "" { Text "E:/戴仙金/资料/Verilog书/源代码/cymometer/main/dispdecoder.v" 9 -1 0 } }  } 0}
{ "Info" "ITAN_SCC_LOOP" "1 " "Info: Found combinational loop of 1 nodes" { { "Info" "ITAN_SCC_NODE" "dispdecoder:inst5\|data_out\[1\]~158 " "Info: Node \"dispdecoder:inst5\|data_out\[1\]~158\"" {  } { { "dispdecoder.v" "" { Text "E:/戴仙金/资料/Verilog书/源代码/cymometer/main/dispdecoder.v" 9 -1 0 } }  } 0}  } { { "dispdecoder.v" "" { Text "E:/戴仙金/资料/Verilog书/源代码/cymometer/main/dispdecoder.v" 9 -1 0 } }  } 0}
{ "Info" "ITAN_SCC_LOOP" "1 " "Info: Found combinational loop of 1 nodes" { { "Info" "ITAN_SCC_NODE" "dispdecoder:inst5\|data_out\[6\]~154 " "Info: Node \"dispdecoder:inst5\|data_out\[6\]~154\"" {  } { { "dispdecoder.v" "" { Text "E:/戴仙金/资料/Verilog书/源代码/cymometer/main/dispdecoder.v" 9 -1 0 } }  } 0}  } { { "dispdecoder.v" "" { Text "E:/戴仙金/资料/Verilog书/源代码/cymometer/main/dispdecoder.v" 9 -1 0 } }  } 0}
{ "Info" "ITAN_SCC_LOOP" "1 " "Info: Found combinational loop of 1 nodes" { { "Info" "ITAN_SCC_NODE" "dispdecoder:inst5\|data_out\[0\]~150 " "Info: Node \"dispdecoder:inst5\|data_out\[0\]~150\"" {  } { { "dispdecoder.v" "" { Text "E:/戴仙金/资料/Verilog书/源代码/cymometer/main/dispdecoder.v" 9 -1 0 } }  } 0}  } { { "dispdecoder.v" "" { Text "E:/戴仙金/资料/Verilog书/源代码/cymometer/main/dispdecoder.v" 9 -1 0 } }  } 0}