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📄 shuzibiao.sim.rpt

📁 数字钟的verilog代码
💻 RPT
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+----------------------+
; Simulation Waveforms ;
+----------------------+
Waveform report data cannot be output to ASCII.
Please use Quartus II to view the waveform report data.


+--------------------------------------------------------------------+
; Coverage Summary                                                   ;
+-----------------------------------------------------+--------------+
; Type                                                ; Value        ;
+-----------------------------------------------------+--------------+
; Total coverage as a percentage                      ;      30.21 % ;
; Total nodes checked                                 ; 681          ;
; Total output ports checked                          ; 705          ;
; Total output ports with complete 1/0-value coverage ; 213          ;
; Total output ports with no 1/0-value coverage       ; 476          ;
; Total output ports with no 1-value coverage         ; 491          ;
; Total output ports with no 0-value coverage         ; 477          ;
+-----------------------------------------------------+--------------+


The following table displays output ports that toggle between 1 and 0 during simulation.
+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Complete 1/0-Value Coverage                                                                                                                                                                         ;
+--------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------+------------------+
; Node Name                                                                            ; Output Port Name                                                                          ; Output Port Type ;
+--------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------+------------------+
; |shuzibiao|clk1                                                                      ; |shuzibiao|clk1                                                                           ; out              ;
; |shuzibiao|clr                                                                       ; |shuzibiao|clr                                                                            ; out              ;
; |shuzibiao|Reset                                                                     ; |shuzibiao|Reset                                                                          ; out              ;
; |shuzibiao|LD1                                                                       ; |shuzibiao|LD1                                                                            ; out              ;
; |shuzibiao|LD2                                                                       ; |shuzibiao|LD2                                                                            ; out              ;
; |shuzibiao|LD3                                                                       ; |shuzibiao|LD3                                                                            ; out              ;
; |shuzibiao|LD4                                                                       ; |shuzibiao|LD4                                                                            ; out              ;
; |shuzibiao|data_in[2]                                                                ; |shuzibiao|data_in[2]                                                                     ; out              ;
; |shuzibiao|data_in[1]                                                                ; |shuzibiao|data_in[1]                                                                     ; out              ;
; |shuzibiao|data_in[0]                                                                ; |shuzibiao|data_in[0]                                                                     ; out              ;
; |shuzibiao|main:inst1|L1~2                                                           ; |shuzibiao|main:inst1|L1~2                                                                ; out              ;
; |shuzibiao|main:inst1|L1~3                                                           ; |shuzibiao|main:inst1|L1~3                                                                ; out              ;
; |shuzibiao|main:inst1|L2~0                                                           ; |shuzibiao|main:inst1|L2~0                                                                ; out              ;
; |shuzibiao|main:inst1|L2~1                                                           ; |shuzibiao|main:inst1|L2~1                                                                ; out              ;
; |shuzibiao|main:inst1|L2~2                                                           ; |shuzibiao|main:inst1|L2~2                                                                ; out              ;
; |shuzibiao|main:inst1|L2~3                                                           ; |shuzibiao|main:inst1|L2~3                                                                ; out              ;
; |shuzibiao|main:inst1|L3~1                                                           ; |shuzibiao|main:inst1|L3~1                                                                ; out              ;
; |shuzibiao|main:inst1|L3~2                                                           ; |shuzibiao|main:inst1|L3~2                                                                ; out              ;
; |shuzibiao|main:inst1|L3~3                                                           ; |shuzibiao|main:inst1|L3~3                                                                ; out              ;
; |shuzibiao|main:inst1|L4~0                                                           ; |shuzibiao|main:inst1|L4~0                                                                ; out              ;
; |shuzibiao|main:inst1|L4~1                                                           ; |shuzibiao|main:inst1|L4~1                                                                ; out              ;
; |shuzibiao|main:inst1|L4~2                                                           ; |shuzibiao|main:inst1|L4~2                                                                ; out              ;
; |shuzibiao|main:inst1|L4~3                                                           ; |shuzibiao|main:inst1|L4~3                                                                ; out              ;
; |shuzibiao|main:inst1|over1~0                                                        ; |shuzibiao|main:inst1|over1~0                                                             ; out              ;
; |shuzibiao|main:inst1|always0~0                                                      ; |shuzibiao|main:inst1|always0~0                                                           ; out0             ;
; |shuzibiao|main:inst1|L1~6                                                           ; |shuzibiao|main:inst1|L1~6                                                                ; out              ;
; |shuzibiao|main:inst1|L1~7                                                           ; |shuzibiao|main:inst1|L1~7                                                                ; out              ;
; |shuzibiao|main:inst1|L1~10                                                          ; |shuzibiao|main:inst1|L1~10                                                               ; out              ;
; |shuzibiao|main:inst1|L1~11                                                          ; |shuzibiao|main:inst1|L1~11                                                               ; out              ;
; |shuzibiao|main:inst1|always0~1                                                      ; |shuzibiao|main:inst1|always0~1                                                           ; out0             ;
; |shuzibiao|main:inst1|L2~4                                                           ; |shuzibiao|main:inst1|L2~4                                                                ; out              ;
; |shuzibiao|main:inst1|L2~5                                                           ; |shuzibiao|main:inst1|L2~5                                                                ; out              ;
; |shuzibiao|main:inst1|L2~6                                                           ; |shuzibiao|main:inst1|L2~6                                                                ; out              ;
; |shuzibiao|main:inst1|L2~7                                                           ; |shuzibiao|main:inst1|L2~7                                                                ; out              ;
; |shuzibiao|main:inst1|L3~5                                                           ; |shuzibiao|main:inst1|L3~5                                                                ; out              ;
; |shuzibiao|main:inst1|L3~6                                                           ; |shuzibiao|main:inst1|L3~6                                                                ; out              ;
; |shuzibiao|main:inst1|L3~7                                                           ; |shuzibiao|main:inst1|L3~7                                                                ; out              ;
; |shuzibiao|main:inst1|L4~4                                                           ; |shuzibiao|main:inst1|L4~4                                                                ; out              ;
; |shuzibiao|main:inst1|L4~5                                                           ; |shuzibiao|main:inst1|L4~5                                                                ; out              ;
; |shuzibiao|main:inst1|L4~6                                                           ; |shuzibiao|main:inst1|L4~6                                                                ; out              ;
; |shuzibiao|main:inst1|L4~7                                                           ; |shuzibiao|main:inst1|L4~7                                                                ; out              ;
; |shuzibiao|main:inst1|always0~2                                                      ; |shuzibiao|main:inst1|always0~2                                                           ; out0             ;
; |shuzibiao|main:inst1|always0~3                                                      ; |shuzibiao|main:inst1|always0~3                                                           ; out0             ;
; |shuzibiao|main:inst1|L1~14                                                          ; |shuzibiao|main:inst1|L1~14                                                               ; out              ;
; |shuzibiao|main:inst1|L1~15                                                          ; |shuzibiao|main:inst1|L1~15                                                               ; out              ;
; |shuzibiao|main:inst1|L2~8                                                           ; |shuzibiao|main:inst1|L2~8                                                                ; out              ;
; |shuzibiao|main:inst1|L2~9                                                           ; |shuzibiao|main:inst1|L2~9                                                                ; out              ;
; |shuzibiao|main:inst1|L2~10                                                          ; |shuzibiao|main:inst1|L2~10                                                               ; out              ;
; |shuzibiao|main:inst1|L2~11                                                          ; |shuzibiao|main:inst1|L2~11                                                               ; out              ;
; |shuzibiao|main:inst1|L1~18                                                          ; |shuzibiao|main:inst1|L1~18                                                               ; out              ;
; |shuzibiao|main:inst1|L1~19                                                          ; |shuzibiao|main:inst1|L1~19                                                               ; out              ;
; |shuzibiao|main:inst1|L2~12                                                          ; |shuzibiao|main:inst1|L2~12                                                               ; out              ;

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