top_ba.v

Core_PWM,verilog语言编写

    AND3 \u0/un1_duty_cycle_r_0_I_16  (.A(\u0/DWACT_BL_EQUAL_0_E_0[6] )
        , .B(\u0/DWACT_BL_EQUAL_0_E_0[7] ), .C(
        \u0/DWACT_BL_EQUAL_0_E_0[8] ), .Y(
        \u0/DWACT_BL_EQUAL_0_DWACT_ANDTREE_E_0[2] ));
    AND3 \u0/un1_counter_0_I_193  (.A(\u0/DWACT_BL_EQUAL_0_E_5[0] ), 
        .B(\u0/DWACT_BL_EQUAL_0_E_5[1] ), .C(
        \u0/DWACT_BL_EQUAL_0_E_5[2] ), .Y(
        \u0/DWACT_BL_EQUAL_0_DWACT_ANDTREE_E_4[0] ));
    AND2 \u0/un1_duty_cycle_r_0_I_40  (.A(
        \u0/DWACT_BL_EQUAL_0_DWACT_ANDTREE_E_1[1] ), .B(
        \u0/DWACT_BL_EQUAL_0_DWACT_ANDTREE_E_2[0] ), .Y(
        \u0/DWACT_CMPLE_PO0_DWACT_COMP0_E_0[1] ));
    NOR2B \u2/un1_status_4_i_0  (.A(\u2/N_80 ), .B(\u2/N_69 ), .Y(
        \u2/un1_status_4_i_0_net_1 ));
    OR2A \u0/un1_counter_0_I_75  (.A(\u0/clock_divide_r[25]_net_1 ), 
        .B(\u0/counter[25]_net_1 ), .Y(\u0/ACT_LT3_E_0[1] ));
    AND3 \u0/un1_duty_cycle_r_0_I_14  (.A(\u0/DWACT_BL_EQUAL_0_E_4[0] )
        , .B(\u0/DWACT_BL_EQUAL_0_E_4[1] ), .C(
        \u0/DWACT_BL_EQUAL_0_E_4[2] ), .Y(
        \u0/DWACT_BL_EQUAL_0_DWACT_ANDTREE_E_3[0] ));
    XNOR2 \u0/un1_duty_cycle_r_0_I_114  (.A(
        \u0/duty_cycle_r[18]_net_1 ), .B(\u0/counter[18]_net_1 ), .Y(
        \u0/DWACT_BL_EQUAL_0_E[8] ));
    DFN1E0C1 \u0/clock_divide_r[13]  (.D(\data[5] ), .CLK(GLA), .CLR(
        rst_c), .E(\u0/N_251_i ), .Q(\u0/clock_divide_r[13]_net_1 ));
    DFN1C1 \u2/addr[2]  (.D(\u2/addr_8[2] ), .CLK(\u2/clk1m_0_0 ), 
        .CLR(rst_c), .Q(\addr[2] ));
    AO1 \u0/un1_counter_0_I_248  (.A(\u0/DWACT_COMP0_E[1] ), .B(
        \u0/DWACT_COMP0_E[2] ), .C(\u0/DWACT_COMP0_E[0] ), .Y(
        \u0/I_248 ));
    DFN1E0C1 \u0/duty_cycle_r[20]  (.D(\data[4] ), .CLK(GLA), .CLR(
        rst_c), .E(\u0/N_331_i ), .Q(\u0/duty_cycle_r[20]_net_1 ));
    OR2A \u0/un1_duty_cycle_r_0_I_88  (.A(\u0/duty_cycle_r[21]_net_1 ), 
        .B(\u0/counter[21]_net_1 ), .Y(\u0/N_107 ));
    OR3B \u0/duty_cycle_r_56_e  (.A(\addr_0[1] ), .B(
        \u0/un1_duty_cycle_r34_net_1 ), .C(\addr_0[0] ), .Y(
        \u0/N_331_i ));
    AND3 \u0/un1_duty_cycle_r_0_I_38  (.A(\u0/DWACT_BL_EQUAL_0_E_3[0] )
        , .B(\u0/DWACT_BL_EQUAL_0_E_3[1] ), .C(
        \u0/DWACT_BL_EQUAL_0_E_3[2] ), .Y(
        \u0/DWACT_BL_EQUAL_0_DWACT_ANDTREE_E_2[0] ));
    AND2 \u0/un8_counter_I_27  (.A(\u0/counter[3]_net_1 ), .B(
        \u0/counter[4]_net_1 ), .Y(\u0/DWACT_FINC_E[1] ));
    DFN1E0C1 \u0/duty_cycle_r[15]  (.D(\data[7] ), .CLK(GLA), .CLR(
        rst_c), .E(\u0/N_315_i ), .Q(\u0/duty_cycle_r[15]_net_1 ));
    XA1 \u0/counter_5[10]  (.A(\u0/N_123 ), .B(\u0/counter[10]_net_1 ), 
        .C(\u0/un1_counter_1 ), .Y(\u0/counter_5[10]_net_1 ));
    OR3A \u2/data_5_0_a2_0[0]  (.A(\u2/status[0]_net_1 ), .B(
        \u2/status[1]_net_1 ), .C(\addr[2] ), .Y(\u2/N_91 ));
    OR2A \u0/un1_counter_0_I_211  (.A(\u0/counter[9]_net_1 ), .B(
        \u0/clock_divide_r[9]_net_1 ), .Y(\u0/N_39_0 ));
    AOI1A \u0/un1_counter_0_I_159  (.A(\u0/ACT_LT4_E_0[3] ), .B(
        \u0/ACT_LT4_E_0[6] ), .C(\u0/ACT_LT4_E_0[10] ), .Y(
        \u0/DWACT_CMPLE_PO0_DWACT_COMP0_E_1[0] ));
    AND2 \u0/un8_counter_I_80  (.A(\u0/counter[12]_net_1 ), .B(
        \u0/counter[13]_net_1 ), .Y(\u0/DWACT_FINC_E[8] ));
    OA1 \u0/un1_counter_0_I_97  (.A(\u0/N_115_0 ), .B(\u0/N_114_0 ), 
        .C(\u0/N_113_0 ), .Y(\u0/DWACT_CMPLE_PO2_DWACT_COMP0_E_4[2] ));
    OR2A \u0/un1_counter_0_I_224  (.A(\u0/clock_divide_r[4]_net_1 ), 
        .B(\u0/counter[4]_net_1 ), .Y(\u0/N_19_1 ));
    AO1C \u0/un1_counter_0_I_170  (.A(\u0/clock_divide_r[11]_net_1 ), 
        .B(\u0/counter[11]_net_1 ), .C(\u0/N_62_0 ), .Y(\u0/N_64_0 ));
    DFN1C1 \u0/counter[19]  (.D(\u0/counter_5[19]_net_1 ), .CLK(GLA), 
        .CLR(rst_c), .Q(\u0/counter[19]_net_1 ));
    NOR2A \u0/un1_counter_0_I_223  (.A(\u0/clock_divide_r[0]_net_1 ), 
        .B(\u0/counter[0]_net_1 ), .Y(\u0/N_18_0 ));
    AOI1A \u0/un1_counter_0_I_155  (.A(\u0/counter[17]_net_1 ), .B(
        \u0/clock_divide_r[17]_net_1 ), .C(\u0/ACT_LT4_E_0[5] ), .Y(
        \u0/ACT_LT4_E_0[6] ));
    XA1 \u0/counter_5[15]  (.A(\u0/N_98 ), .B(\u0/counter[15]_net_1 ), 
        .C(\u0/un1_counter_1 ), .Y(\u0/counter_5[15]_net_1 ));
    AOI1A \u0/un1_duty_cycle_r_0_I_155  (.A(
        \u0/duty_cycle_r[17]_net_1 ), .B(\u0/counter[17]_net_1 ), .C(
        \u0/ACT_LT4_E[5] ), .Y(\u0/ACT_LT4_E[6] ));
    IOPAD_IN \rst_pad/U0/U0  (.PAD(rst), .Y(\rst_pad/U0/NET1 ));
    XNOR2 \u0/un1_duty_cycle_r_0_I_34  (.A(\u0/duty_cycle_r[31]_net_1 )
        , .B(\u0/counter[31]_net_1 ), .Y(\u0/DWACT_BL_EQUAL_0_E_1[4] ));
    AND3 \u0/un1_duty_cycle_r_0_I_69  (.A(\u0/DWACT_BL_EQUAL_0_E_2[2] )
        , .B(\u0/DWACT_BL_EQUAL_0_E_2[1] ), .C(
        \u0/DWACT_BL_EQUAL_0_E_2[0] ), .Y(
        \u0/DWACT_CMPLE_PO2_DWACT_COMP0_E_1[1] ));
    OR2A \u0/un1_duty_cycle_r_0_I_224  (.A(\u0/counter[4]_net_1 ), .B(
        \u0/duty_cycle_r[4]_net_1 ), .Y(\u0/N_19_0 ));
    NOR3C \u0/un1_duty_cycle_r_0_I_195  (.A(\u0/DWACT_BL_EQUAL_0_E[4] )
        , .B(\u0/DWACT_BL_EQUAL_0_E[3] ), .C(
        \u0/DWACT_BL_EQUAL_0_DWACT_ANDTREE_E[0] ), .Y(
        \u0/DWACT_CMPLE_PO2_DWACT_COMP0_E_0[1] ));
    DFN1E0C1 \u0/clock_divide_r[2]  (.D(\data[2] ), .CLK(GLA), .CLR(
        rst_c), .E(\u0/N_235_i ), .Q(\u0/clock_divide_r[2]_net_1 ));
    AND3 \u0/un1_counter_0_I_123  (.A(\u0/DWACT_BL_EQUAL_0_E_7[0] ), 
        .B(\u0/DWACT_BL_EQUAL_0_E_7[1] ), .C(
        \u0/DWACT_BL_EQUAL_0_E_7[2] ), .Y(
        \u0/DWACT_BL_EQUAL_0_DWACT_ANDTREE_E_6[0] ));
    AND3 \u0/un8_counter_I_179  (.A(\u0/DWACT_FINC_E[15] ), .B(
        \u0/DWACT_FINC_E[17] ), .C(\u0/DWACT_FINC_E[20] ), .Y(
        \u0/DWACT_FINC_E[21] ));
    NOR3A \u2/cou_16_0_a3[4]  (.A(\u2/I_22 ), .B(\u2/N_143 ), .C(
        \u2/un1_status_6_0_0_net_1 ), .Y(\u2/cou_16[4] ));
    AO1C \u0/un1_duty_cycle_r_0_I_93  (.A(\u0/duty_cycle_r[21]_net_1 ), 
        .B(\u0/counter[21]_net_1 ), .C(\u0/N_106 ), .Y(\u0/N_112 ));
    NOR2A \u0/un1_duty_cycle_r_0_I_223  (.A(\u0/counter[0]_net_1 ), .B(
        \u0/duty_cycle_r[0]_net_1 ), .Y(\u0/N_18 ));
    XNOR2 \u0/un1_duty_cycle_r_0_I_119  (.A(
        \u0/duty_cycle_r[10]_net_1 ), .B(\u0/counter[10]_net_1 ), .Y(
        \u0/DWACT_BL_EQUAL_0_E_1[0] ));
    AND3 \u0/un8_counter_I_48  (.A(\u0/DWACT_FINC_E[0] ), .B(
        \u0/DWACT_FINC_E[2] ), .C(\u0/DWACT_FINC_E[3] ), .Y(
        \u0/DWACT_FINC_E[4] ));
    XA1 \u0/counter_5[20]  (.A(\u0/N_71 ), .B(\u0/counter[20]_net_1 ), 
        .C(\u0/un1_counter_1 ), .Y(\u0/counter_5[20]_net_1 ));
    XA1A \u0/un1_counter_0_I_39  (.A(\u0/counter[30]_net_1 ), .B(
        \u0/clock_divide_r[30]_net_1 ), .C(
        \u0/DWACT_BL_EQUAL_0_E_5[4] ), .Y(
        \u0/DWACT_BL_EQUAL_0_DWACT_ANDTREE_E_5[1] ));
    OR2A \u0/un1_duty_cycle_r_0_I_167  (.A(\u0/duty_cycle_r[12]_net_1 )
        , .B(\u0/counter[12]_net_1 ), .Y(\u0/N_61_0 ));
    AO1 \u0/un1_duty_cycle_r_0_I_104  (.A(
        \u0/DWACT_CMPLE_PO2_DWACT_COMP0_E_1[1] ), .B(
        \u0/DWACT_CMPLE_PO2_DWACT_COMP0_E_1[2] ), .C(
        \u0/DWACT_CMPLE_PO2_DWACT_COMP0_E_1[0] ), .Y(
        \u0/DWACT_CMPLE_PO0_DWACT_COMP0_E_0[2] ));
    OR2A \u0/un1_counter_0_I_207  (.A(\u0/clock_divide_r[9]_net_1 ), 
        .B(\u0/counter[9]_net_1 ), .Y(\u0/N_35_0 ));
    AO1C \u0/un1_duty_cycle_r_0_I_227  (.A(\u0/duty_cycle_r[2]_net_1 ), 
        .B(\u0/counter[2]_net_1 ), .C(\u0/N_16 ), .Y(\u0/N_22 ));
    DFN1C1 \u2/cou[4]  (.D(\u2/cou_16[4] ), .CLK(\u2/clk1m_0 ), .CLR(
        rst_c), .Q(\u2/cou[4]_net_1 ));
    AO1C \u0/un1_duty_cycle_r_0_I_212  (.A(\u0/duty_cycle_r[8]_net_1 ), 
        .B(\u0/counter[8]_net_1 ), .C(\u0/N_35 ), .Y(\u0/N_40_0 ));
    XA1 \u0/counter_5[25]  (.A(\u0/N_40 ), .B(\u0/counter[25]_net_1 ), 
        .C(\u0/un1_counter_0 ), .Y(\u0/counter_5[25]_net_1 ));
    NOR2A \u0/un1_duty_cycle_r_0_I_206  (.A(\u0/counter[5]_net_1 ), .B(
        \u0/duty_cycle_r[5]_net_1 ), .Y(\u0/N_34 ));
    NOR2B \u2/count_5[4]  (.A(\u2/I_20_1 ), .B(\u2/clk1m6_net_1 ), .Y(
        \u2/count_5[4]_net_1 ));
    BUFF \u2/clk1m_inferred_clock_0  (.A(\u2/clk1m_net_1 ), .Y(
        \u2/clk1m_0 ));
    NOR2A \u0/un1_counter_0_I_74  (.A(\u0/clock_divide_r[24]_net_1 ), 
        .B(\u0/counter[24]_net_1 ), .Y(\u0/ACT_LT3_E_0[0] ));
    XNOR2 \u0/un1_counter_0_I_13  (.A(\u0/counter[20]_net_1 ), .B(
        \u0/clock_divide_r[20]_net_1 ), .Y(
        \u0/DWACT_BL_EQUAL_0_E_10[1] ));
    DFN1E0C1 \u0/clock_divide_r[22]  (.D(\data[6] ), .CLK(GLA), .CLR(
        rst_c), .E(\u0/N_267_i ), .Q(\u0/clock_divide_r[22]_net_1 ));
    NOR2B \u2/un1_cou_1_I_26  (.A(\u2/DWACT_ADD_CI_0_TMP_0[0] ), .B(
        \u2/cou[1]_net_1 ), .Y(\u2/DWACT_ADD_CI_0_g_array_1[0] ));
    AX1C \u2/un6_count_1_I_20  (.A(\u2/count[3]_net_1 ), .B(
        \u2/DWACT_FINC_E[0] ), .C(\u2/count[4]_net_1 ), .Y(\u2/I_20_1 )
        );
    NOR2A \u0/un1_duty_cycle_r_0_I_51  (.A(\u0/counter[27]_net_1 ), .B(
        \u0/duty_cycle_r[27]_net_1 ), .Y(\u0/N_134 ));
    AND2A \u0/un1_counter_0_I_151  (.A(\u0/clock_divide_r[16]_net_1 ), 
        .B(\u0/counter[16]_net_1 ), .Y(\u0/ACT_LT4_E_0[2] ));
    XNOR2 \u0/un1_duty_cycle_r_0_I_67  (.A(\u0/duty_cycle_r[25]_net_1 )
        , .B(\u0/counter[25]_net_1 ), .Y(\u0/DWACT_BL_EQUAL_0_E_2[1] ));
    OA1A \u0/un1_duty_cycle_r_0_I_175  (.A(\u0/N_64 ), .B(\u0/N_66_0 ), 
        .C(\u0/N_65 ), .Y(\u0/N_69 ));
    AND2 \u0/un8_counter_I_206  (.A(\u0/counter[27]_net_1 ), .B(
        \u0/counter[28]_net_1 ), .Y(\u0/DWACT_FINC_E[25] ));
    DFN1E0C1 \u0/clock_divide_r[6]  (.D(\data[6] ), .CLK(GLA), .CLR(
        rst_c), .E(\u0/N_235_i ), .Q(\u0/clock_divide_r[6]_net_1 ));
    NOR2 \u2/status_0_sqmuxa_2_i_o3  (.A(\u2/status[1]_net_1 ), .B(
        \u2/status[0]_net_1 ), .Y(\u2/N_50 ));
    IOTRI_ORC_EB \pwmout_pad/U0/U1  (.D(\u0/un1_duty_cycle_r_i ), .CLR(
        rst_c), .E(VCC), .OCLK(GLA), .DOUT(\pwmout_pad/U0/NET1 ), 
        .EOUT(\pwmout_pad/U0/NET2 ));
    DFN1C1 \u2/count[1]  (.D(\u2/I_5_0 ), .CLK(CLK48M_c), .CLR(rst_c), 
        .Q(\u2/count[1]_net_1 ));
    XA1 \u0/counter_5[4]  (.A(\u0/N_149 ), .B(\u0/counter[4]_net_1 ), 
        .C(\u0/I_248 ), .Y(\u0/counter_5[4]_net_1 ));
    XA1 \u0/counter_5[18]  (.A(\u0/N_81 ), .B(\u0/counter[18]_net_1 ), 
        .C(\u0/un1_counter_1 ), .Y(\u0/counter_5[18]_net_1 ));
    NOR2A \u0/un1_counter_0_I_149  (.A(\u0/clock_divide_r[15]_net_1 ), 
        .B(\u0/counter[15]_net_1 ), .Y(\u0/ACT_LT4_E_0[0] ));
    NOR3B \u0/un1_duty_cycle_r34_1  (.A(CS), .B(WE), .C(\addr[2] ), .Y(
        \u0/un1_duty_cycle_r34_1_net_1 ));
    XNOR2 \u0/un1_counter_0_I_9  (.A(\u0/counter[24]_net_1 ), .B(
        \u0/clock_divide_r[24]_net_1 ), .Y(
        \u0/DWACT_BL_EQUAL_0_E_2[5] ));
    DFN1C1 \u0/counter[12]  (.D(\u0/counter_5[12]_net_1 ), .CLK(GLA), 
        .CLR(rst_c), .Q(\u0/counter[12]_net_1 ));
    DFN1E0C1 \u0/clock_divide_r[10]  (.D(\data[2] ), .CLK(GLA), .CLR(
        rst_c), .E(\u0/N_251_i ), .Q(\u0/clock_divide_r[10]_net_1 ));
    DFN1E1C1 \u2/data[6]  (.D(\u2/data_5[7] ), .CLK(\u2/clk1m_net_1 ), 
        .CLR(rst_c), .E(\u2/N_42_i_0 ), .Q(\data[6] ));
    AND3 \u0/un8_counter_I_213  (.A(\u0/counter[27]_net_1 ), .B(
        \u0/counter[28]_net_1 ), .C(\u0/counter[29]_net_1 ), .Y(
        \u0/DWACT_FINC_E[26] ));
    AO1 \u0/un1_duty_cycle_r_0_I_243  (.A(
        \u0/DWACT_CMPLE_PO2_DWACT_COMP0_E[1] ), .B(
        \u0/DWACT_CMPLE_PO2_DWACT_COMP0_E[2] ), .C(
        \u0/DWACT_CMPLE_PO2_DWACT_COMP0_E[0] ), .Y(
        \u0/DWACT_COMP0_E_0[2] ));
    AO1 \u0/un1_duty_cycle_r_0_I_109  (.A(
        \u0/DWACT_CMPLE_PO0_DWACT_COMP0_E_0[1] ), .B(
        \u0/DWACT_CMPLE_PO0_DWACT_COMP0_E_0[2] ), .C(
        \u0/DWACT_CMPLE_PO0_DWACT_COMP0_E_0[0] ), .Y(
        \u0/DWACT_COMP0_E_0[0] ));
    OR2 \u2/data_5_0[5]  (.A(\u2/data_5[2] ), .B(\u2/N_83 ), .Y(
        \u2/data_5[7] ));
    AND3 \u0/un8_counter_I_44  (.A(\u0/DWACT_FINC_E[0] ), .B(
        \u0/DWACT_FINC_E[2] ), .C(\u0/DWACT_FINC_E[3] ), .Y(\u0/N_131 )
        );
    XNOR2 \u0/un1_duty_cycle_r_0_I_11  (.A(\u0/duty_cycle_r[29]_net_1 )
        , .B(\u0/counter[29]_net_1 ), .Y(\u0/DWACT_BL_EQUAL_0_E[10] ));
    XA1 \u0/counter_5[14]  (.A(\u0/N_103 ), .B(\u0/counter[14]_net_1 ), 
        .C(\u0/un1_counter_1 ), .Y(\u0/counter_5[14]_net_1 ));
    DFN1E0C1 \u0/duty_cycle_r[11]  (.D(\data[3] ), .CLK(GLA), .CLR(
        rst_c), .E(\u0/N_315_i ), .Q(\u0/duty_cycle_r[11]_net_1 ));
    NOR2 \u2/un1_status_4_i_0_o3  (.A(\u2/N_88 ), .B(\u2/N_74 ), .Y(
        \u2/N_80 ));
    AND3 \u0/un8_counter_I_16  (.A(\u0/counter[0]_net_1 ), .B(
        \u0/counter[1]_net_1 ), .C(\u0/counter[2]_net_1 ), .Y(
        \u0/DWACT_FINC_E[0] ));
    DFN1C1 \u0/counter[14]  (.D(\u0/counter_5[14]_net_1 ), .CLK(GLA), 
        .CLR(rst_c), .Q(\u0/counter[14]_net_1 ));
    OR2A \u0/un1_counter_0_I_166  (.A(\u0/clock_divide_r[11]_net_1 ), 
        .B(\u0/counter[11]_net_1 ), .Y(\u0/N_60_0 ));
    DFN1C1 \u0/counter[15]  (.D(\u0/counter_5[15]_net_1 ), .CLK(GLA), 
        .CLR(rst_c), .Q(\u0/counter[15]_net_1 ));
    DFN1C1 \u2/cou[0]  (.D(\u2/cou_16[0] ), .CLK(\u2/clk1m_0 ), .CLR(
        rst_c), .Q(\u2/cou[0]_net_1 ));