📄 top_ba.sdf
字号:
)
(TIMINGCHECK
(SETUP (posedge D) (posedge CLK) (2.90:3.56:4.02))
(SETUP (negedge D) (posedge CLK) (2.71:3.34:3.76))
(HOLD (posedge D) (posedge CLK) (0.00:0.00:0.00))
(HOLD (negedge D) (posedge CLK) (0.00:0.00:0.00))
(WIDTH (posedge CLK) (3.10:3.56:3.56))
(WIDTH (negedge CLK) (2.80:3.22:3.22))
(WIDTH (posedge CLR) (1.92:2.21:2.21))
(RECOVERY (negedge CLR) (posedge CLK) (1.60:1.97:2.22))
(HOLD (negedge CLR) (posedge CLK) (0.00:0.00:0.00))
(SETUP (posedge E) (posedge CLK) (3.28:4.02:4.54))
(SETUP (negedge E) (posedge CLK) (2.34:2.88:3.25))
(HOLD (posedge E) (posedge CLK) (0.00:0.00:0.00))
(HOLD (negedge E) (posedge CLK) (0.00:0.00:0.00))
)
)
(CELL
(CELLTYPE "DFN1E0C1")
(INSTANCE u0\/duty_cycle_r\[26\])
(DELAY
(ABSOLUTE
(PORT D (12.01:14.57:15.91) (11.56:14.02:15.30))
(PORT CLK (4.46:5.41:5.90) (4.55:5.52:6.02))
(IOPATH CLK Q (3.13:3.84:4.34) (3.97:4.88:5.50))
(PORT CLR (4.22:5.12:5.59) (4.33:5.25:5.74))
(IOPATH CLR Q () (2.87:3.53:3.99))
(PORT E (12.88:15.62:17.05) (12.17:14.76:16.12))
)
)
(TIMINGCHECK
(SETUP (posedge D) (posedge CLK) (2.90:3.56:4.02))
(SETUP (negedge D) (posedge CLK) (2.71:3.34:3.76))
(HOLD (posedge D) (posedge CLK) (0.00:0.00:0.00))
(HOLD (negedge D) (posedge CLK) (0.00:0.00:0.00))
(WIDTH (posedge CLK) (3.10:3.56:3.56))
(WIDTH (negedge CLK) (2.80:3.22:3.22))
(WIDTH (posedge CLR) (1.92:2.21:2.21))
(RECOVERY (negedge CLR) (posedge CLK) (1.60:1.97:2.22))
(HOLD (negedge CLR) (posedge CLK) (0.00:0.00:0.00))
(SETUP (posedge E) (posedge CLK) (3.28:4.02:4.54))
(SETUP (negedge E) (posedge CLK) (2.34:2.88:3.25))
(HOLD (posedge E) (posedge CLK) (0.00:0.00:0.00))
(HOLD (negedge E) (posedge CLK) (0.00:0.00:0.00))
)
)
(CELL
(CELLTYPE "OR2A")
(INSTANCE u0\/un1_counter_0_I_50)
(DELAY
(ABSOLUTE
(PORT A (2.64:3.21:3.50) (2.44:2.96:3.23))
(IOPATH A Y (2.51:3.08:3.48) (2.89:3.55:4.01))
(PORT B (7.84:9.51:10.39) (7.24:8.78:9.58))
(IOPATH B Y (2.77:3.40:3.84) (3.48:4.28:4.83))
)
)
)
(CELL
(CELLTYPE "IOIN_IB")
(INSTANCE rst_pad\/U0\/U1)
(DELAY
(ABSOLUTE
(PORT YIN (0.00:0.00:0.00) (0.00:0.00:0.00))
(IOPATH YIN Y (0.23:0.29:0.32) (0.22:0.26:0.30))
)
)
)
(CELL
(CELLTYPE "OR3A")
(INSTANCE u2\/status_0_sqmuxa_1_0_a4_0_a3)
(DELAY
(ABSOLUTE
(PORT A (10.57:12.82:14.00) (9.80:11.88:12.97))
(IOPATH A Y (2.50:3.07:3.47) (2.83:3.47:3.92))
(PORT B (9.49:11.51:12.57) (8.85:10.74:11.72))
(IOPATH B Y (3.45:4.24:4.79) (3.85:4.73:5.34))
(PORT C (5.46:6.63:7.23) (5.14:6.23:6.80))
(IOPATH C Y (3.45:4.24:4.79) (3.58:4.39:4.96))
)
)
)
(CELL
(CELLTYPE "AND3")
(INSTANCE u0\/un8_counter_I_90)
(DELAY
(ABSOLUTE
(PORT A (7.19:8.72:9.52) (6.78:8.22:8.97))
(IOPATH A Y (2.83:3.47:3.92) (2.50:3.07:3.47))
(PORT B (19.06:23.11:25.24) (17.85:21.64:23.63))
(IOPATH B Y (3.36:4.13:4.66) (3.27:4.01:4.53))
(PORT C (14.47:17.55:19.16) (13.43:16.29:17.79))
(IOPATH C Y (3.58:4.40:4.97) (3.45:4.24:4.79))
)
)
)
(CELL
(CELLTYPE "XNOR2")
(INSTANCE u0\/un1_counter_0_I_117)
(DELAY
(ABSOLUTE
(PORT A (8.23:9.98:10.90) (7.45:9.04:9.87))
(IOPATH A Y (1.85:3.23:3.65) (2.13:2.70:3.05))
(PORT B (1.92:2.33:2.54) (1.85:2.25:2.45))
(IOPATH B Y (3.58:6.20:7.00) (3.25:4.15:4.69))
)
)
)
(CELL
(CELLTYPE "OR2A")
(INSTANCE u0\/un1_duty_cycle_r_0_I_205)
(DELAY
(ABSOLUTE
(PORT A (2.22:2.69:2.94) (2.09:2.54:2.77))
(IOPATH A Y (2.51:3.08:3.48) (2.89:3.55:4.01))
(PORT B (6.32:7.66:8.37) (5.92:7.18:7.84))
(IOPATH B Y (2.77:3.40:3.84) (3.48:4.28:4.83))
)
)
)
(CELL
(CELLTYPE "DFN1C1")
(INSTANCE u0\/counter\[21\])
(DELAY
(ABSOLUTE
(PORT D (5.65:6.85:7.48) (5.32:6.45:7.04))
(PORT CLK (4.53:5.49:6.00) (4.61:5.60:6.11))
(IOPATH CLK Q (3.13:3.84:4.34) (3.97:4.88:5.50))
(PORT CLR (4.48:5.43:5.93) (4.56:5.53:6.04))
(IOPATH CLR Q () (2.87:3.53:3.99))
)
)
(TIMINGCHECK
(SETUP (posedge D) (posedge CLK) (3.09:3.80:4.28))
(SETUP (negedge D) (posedge CLK) (2.90:3.56:4.02))
(HOLD (posedge D) (posedge CLK) (0.00:0.00:0.00))
(HOLD (negedge D) (posedge CLK) (0.00:0.00:0.00))
(WIDTH (posedge CLK) (3.10:3.56:3.56))
(WIDTH (negedge CLK) (2.80:3.22:3.22))
(WIDTH (posedge CLR) (1.92:2.21:2.21))
(RECOVERY (negedge CLR) (posedge CLK) (1.60:1.97:2.22))
(HOLD (negedge CLR) (posedge CLK) (0.00:0.00:0.00))
)
)
(CELL
(CELLTYPE "AND2")
(INSTANCE u0\/un8_counter_I_199)
(DELAY
(ABSOLUTE
(PORT A (5.91:7.17:7.83) (5.57:6.76:7.38))
(IOPATH A Y (2.63:3.23:3.65) (2.77:3.40:3.84))
(PORT B (1.92:2.33:2.54) (1.85:2.25:2.45))
(IOPATH B Y (2.78:3.42:3.86) (3.38:4.15:4.69))
)
)
)
(CELL
(CELLTYPE "DFN1C1")
(INSTANCE u0\/counter\[6\])
(DELAY
(ABSOLUTE
(PORT D (1.92:2.33:2.54) (1.85:2.25:2.45))
(PORT CLK (4.53:5.50:6.00) (4.61:5.59:6.10))
(IOPATH CLK Q (3.13:3.84:4.34) (3.97:4.88:5.50))
(PORT CLR (4.48:5.44:5.94) (4.55:5.51:6.02))
(IOPATH CLR Q () (2.87:3.53:3.99))
)
)
(TIMINGCHECK
(SETUP (posedge D) (posedge CLK) (3.09:3.80:4.28))
(SETUP (negedge D) (posedge CLK) (2.90:3.56:4.02))
(HOLD (posedge D) (posedge CLK) (0.00:0.00:0.00))
(HOLD (negedge D) (posedge CLK) (0.00:0.00:0.00))
(WIDTH (posedge CLK) (3.10:3.56:3.56))
(WIDTH (negedge CLK) (2.80:3.22:3.22))
(WIDTH (posedge CLR) (1.92:2.21:2.21))
(RECOVERY (negedge CLR) (posedge CLK) (1.60:1.97:2.22))
(HOLD (negedge CLR) (posedge CLK) (0.00:0.00:0.00))
)
)
(CELL
(CELLTYPE "DFN1C1")
(INSTANCE u0\/counter\[27\])
(DELAY
(ABSOLUTE
(PORT D (1.92:2.33:2.54) (1.85:2.25:2.45))
(PORT CLK (4.56:5.53:6.04) (4.64:5.63:6.15))
(IOPATH CLK Q (3.13:3.84:4.34) (3.97:4.88:5.50))
(PORT CLR (4.51:5.47:5.97) (4.58:5.55:6.06))
(IOPATH CLR Q () (2.87:3.53:3.99))
)
)
(TIMINGCHECK
(SETUP (posedge D) (posedge CLK) (3.09:3.80:4.28))
(SETUP (negedge D) (posedge CLK) (2.90:3.56:4.02))
(HOLD (posedge D) (posedge CLK) (0.00:0.00:0.00))
(HOLD (negedge D) (posedge CLK) (0.00:0.00:0.00))
(WIDTH (posedge CLK) (3.10:3.56:3.56))
(WIDTH (negedge CLK) (2.80:3.22:3.22))
(WIDTH (posedge CLR) (1.92:2.21:2.21))
(RECOVERY (negedge CLR) (posedge CLK) (1.60:1.97:2.22))
(HOLD (negedge CLR) (posedge CLK) (0.00:0.00:0.00))
)
)
(CELL
(CELLTYPE "NOR2B")
(INSTANCE u0\/counter_5\[9\])
(DELAY
(ABSOLUTE
(PORT A (7.32:8.88:9.69) (6.85:8.30:9.07))
(IOPATH A Y (2.63:3.23:3.65) (2.77:3.40:3.84))
(PORT B (8.17:9.91:10.81) (7.60:9.22:10.06))
(IOPATH B Y (2.78:3.42:3.86) (3.38:4.15:4.69))
)
)
)
(CELL
(CELLTYPE "OR2A")
(INSTANCE u0\/un1_duty_cycle_r_0_I_222)
(DELAY
(ABSOLUTE
(PORT A (1.97:2.39:2.61) (1.91:2.31:2.52))
(IOPATH A Y (2.51:3.08:3.48) (2.89:3.55:4.01))
(PORT B (8.35:10.13:11.06) (7.76:9.42:10.28))
(IOPATH B Y (2.77:3.40:3.84) (3.48:4.28:4.83))
)
)
)
(CELL
(CELLTYPE "AO1C")
(INSTANCE u0\/un1_duty_cycle_r_0_I_172)
(DELAY
(ABSOLUTE
(PORT A (5.71:6.93:7.56) (5.21:6.32:6.90))
(IOPATH A Y (2.08:2.55:2.88) (1.98:2.44:2.75))
(PORT B (10.18:12.35:13.48) (9.49:11.51:12.57))
(IOPATH B Y (2.44:3.00:3.39) (3.21:3.94:4.45))
(PORT C (1.92:2.33:2.54) (1.83:2.23:2.43))
(IOPATH C Y (3.79:4.66:5.26) (4.13:5.07:5.72))
)
)
)
(CELL
(CELLTYPE "DFN1C1")
(INSTANCE u0\/counter\[13\])
(DELAY
(ABSOLUTE
(PORT D (1.92:2.33:2.54) (1.83:2.23:2.43))
(PORT CLK (4.53:5.50:6.00) (4.61:5.59:6.10))
(IOPATH CLK Q (3.13:3.84:4.34) (3.97:4.88:5.50))
(PORT CLR (4.48:5.43:5.93) (4.55:5.52:6.02))
(IOPATH CLR Q () (2.87:3.53:3.99))
)
)
(TIMINGCHECK
(SETUP (posedge D) (posedge CLK) (3.09:3.80:4.28))
(SETUP (negedge D) (posedge CLK) (2.90:3.56:4.02))
(HOLD (posedge D) (posedge CLK) (0.00:0.00:0.00))
(HOLD (negedge D) (posedge CLK) (0.00:0.00:0.00))
(WIDTH (posedge CLK) (3.10:3.56:3.56))
(WIDTH (negedge CLK) (2.80:3.22:3.22))
(WIDTH (posedge CLR) (1.92:2.21:2.21))
(RECOVERY (negedge CLR) (posedge CLK) (1.60:1.97:2.22))
(HOLD (negedge CLR) (posedge CLK) (0.00:0.00:0.00))
)
)
(CELL
(CELLTYPE "AND3")
(INSTANCE u0\/un1_counter_0_I_38)
(DELAY
(ABSOLUTE
(PORT A (1.85:2.24:2.45) (1.76:2.14:2.34))
(IOPATH A Y (2.63:3.23:3.65) (1.94:2.38:2.69))
(PORT B (5.94:7.20:7.86) (5.50:6.67:7.28))
(IOPATH B Y (3.86:4.74:5.35) (3.45:4.24:4.79))
(PORT C (1.92:2.33:2.54) (1.83:2.23:2.43))
(IOPATH C Y (4.04:4.97:5.61) (3.67:4.51:5.09))
)
)
)
(CELL
(CELLTYPE "OA1")
(INSTANCE u0\/un1_counter_0_I_214)
(DELAY
(ABSOLUTE
(PORT A (1.92:2.33:2.54) (1.85:2.25:2.45))
(IOPATH A Y (5.30:6.51:7.35) (3.94:4.84:5.46))
(PORT B (1.92:2.33:2.54) (1.83:2.23:2.43))
(IOPATH B Y (4.90:6.03:6.80) (3.27:4.01:4.53))
(PORT C (6.43:7.80:8.52) (5.88:7.14:7.79))
(IOPATH C Y (2.83:3.47:3.92) (2.62:3.22:3.63))
)
)
)
(CELL
(CELLTYPE "OA1A")
(INSTANCE u0\/un1_counter_0_I_213)
(DELAY
(ABSOLUTE
(PORT A (1.92:2.33:2.54) (1.85:2.25:2.45))
(IOPATH A Y (5.30:6.51:7.35) (3.94:4.84:5.46))
(PORT B (3.66:4.44:4.84) (3.44:4.17:4.56))
(IOPATH B Y (4.90:6.03:6.80) (3.27:4.01:4.53))
(PORT C (1.85:2.24:2.45) (1.76:2.14:2.34))
(IOPATH C Y (2.14:2.63:2.97) (2.18:2.68:3.02))
)
)
)
(CELL
(CELLTYPE "DFN1E0C1")
(INSTANCE u0\/duty_cycle_r\[6\])
(DELAY
(ABSOLUTE
(PORT D (6.31:7.65:8.35) (5.95:7.21:7.88))
(PORT CLK (4.59:5.57:6.08) (4.67:5.66:6.18))
(IOPATH CLK Q (3.13:3.84:4.34) (3.97:4.88:5.50))
(PORT CLR (4.26:5.16:5.64) (4.39:5.33:5.82))
(IOPATH CLR Q () (2.87:3.53:3.99))
(PORT E (10.40:12.62:13.77) (9.65:11.71:12.78))
)
)
(TIMINGCHECK
(SETUP (posedge D) (posedge CLK) (2.90:3.56:4.02))
(SETUP (negedge D) (posedge CLK) (2.71:3.34:3.76))
(HOLD (posedge D) (posedge CLK) (0.00:0.00:0.00))
(HOLD (negedge D) (posedge CLK) (0.00:0.00:0.00))
(WIDTH (posedge CLK) (3.10:3.56:3.56))
(WIDTH (negedge CLK) (2.80:3.22:3.22))
(WIDTH (posedge CLR) (1.92:2.21:2.21))
(RECOVERY (negedge CLR) (posedge CLK) (1.60:1.97:2.22))
(HOLD (negedge CLR) (posedge CLK) (0.00:0.00:0.00))
(SETUP (posedge E) (posedge CLK) (3.28:4.02:4.54))
(SETUP (negedge E) (posedge CLK) (2.34:2.88:3.25))
(HOLD (posedge E) (posedge CLK) (0.00:0.00:0.00))
(HOLD (negedge E) (posedge CLK) (0.00:0.00:0.00))
)
)
(CELL
(CELLTYPE "OR3")
(INSTANCE u2\/status_ns_1_iv_0\[0\])
(DELAY
(ABSOLUTE
(PORT A (1.85:2.24:2.45) (1.76:2.14:2.34))
(IOPATH A Y (2.50:3.07:3.47) (2.83:3.47:3.92))
(PORT B (9.14:11.08:12.10) (8.34:10.12:11.04))
(IOPATH B Y (3.45:4.24:4.79) (3.85:4.73:5.34))
(PORT C (6.43:7.80:8.52) (5.95:7.22:7.88))
(IOPATH C Y (3.68:4.52:5.10) (4.04:4.97:5.61))
)
)
)
(CELL
(CELLTYPE "OA1A")
(INSTANCE u0\/un1_duty_cycle_r_0_I_230)
(DELAY
(ABSOLUTE
(PORT A (2.08:2.52:2.75) (2.01:2.44:2.66))
(IOPATH A Y (5.30:6.51:7.35) (3.94:4.84:5.46))
(PORT B (2.08:2.52:2.75) (2.01:2.44:2.66))
(IOPATH B Y (4.90:6.03:6.80) (3.27:4.01:4.53))
(PORT C (1.99:2.41:2.63) (1.92:2.33:2.55))
(IOPATH C Y (2.14:2.63:2.97) (2.18:2.68:3.02))
)
)
)
(CELL
(CELLTYPE "OR2A")
(INSTANCE u0\/un1_duty_cycle_r_0_I_52)
(DELAY
(ABSOLUTE
(PORT A (12.55:15.22:16.62) (11.57:14.03:15.32))
(IOPATH A Y (2.51:3.08:3.48) (2.89:3.55:4.01))
(PORT B (7.28:8.83:9.64) (6.68:8.10:8.84))
(IOPATH B Y (2.77:3.40:3.84) (3.48:4.28:4.83))
)
)
)
(CELL
(CELLTYPE "XNOR2")
(INSTANCE u0\/un1_counter_0_I_136)
(DELAY
(ABSOLUTE
(PORT A (6.88:8.35:9.11) (6.33:7.67:8.38))
(IOPATH A Y (1.85:3.23:3.65) (2.13:2.70:3.05))
(PORT B (3.98:4.83:5.28) (3.75:4.55:4.97))
(IOPATH B Y (3.58:6.20:7.00) (3.25:4.15:4.69))
)
)
)
(CELL
(CELLTYPE "DFN1E0C1")
(INSTANCE u0\/duty_cycle_r\[27\])
(DELAY
(ABSOLUTE
(PORT D (12.32:14.94:16.31) (11.72:14.21:15.52))
(PORT CLK (4.46:5.41:5.91) (4.55:5.52:6.03))
(IOPATH CLK Q (3.13:3.84:4.34) (3.97:4.88:5.50))
(PORT CLR (4.21:5.11:5.58) (4.33:5.25:5.73))
(IOPATH CLR Q () (2.87:3.53:3.99))
(PORT E (17.39:21.09:23.03) (16.22:19.67:21.48))
)
)
(TIMINGCHECK
(SETUP (posedge D) (posedge CLK) (2.90:3.56:4.02))
(SETUP (negedge D) (posedge CLK) (2.71:3.34:3.76))
(HOLD (posedge D) (posedge CLK) (0.00:0.00:0.00))
(HOLD (negedge D) (posedge CLK) (0.00:0.00:0.00))
(WIDTH (posedge CLK) (3.10:3.56:3.56))
(WIDTH (negedge CLK) (2.80:3.22:3.22))
(WIDTH (posedge CLR) (1.92:2.21:2.21))
(RECOVERY (negedge CLR) (posedge CLK) (1.60:1.97:2.22))
(HOLD (negedge CLR) (posedge CLK) (0.00:0.00:0.00))
(SETUP (posedge E) (posedge CLK) (3.28:4.02:4.54))
(SETUP (negedge E) (posedge CLK) (2.34:2.88:3.25))
(HOLD (posedge E) (posedge CLK) (0.00:0.00:0.00))
(HOLD (negedge E) (posedge CLK) (0.00:0.00:0.00))
)
)
(CELL
(CELLTYPE "OR3C")
(INSTANCE u2\/un1_status_6_0_0_a3_0)
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -