⭐ 欢迎来到虫虫下载站! | 📦 资源下载 📁 资源专辑 ℹ️ 关于我们
⭐ 虫虫下载站

📄 top.v

📁 Core_PWM,verilog语言编写
💻 V
📖 第 1 页 / 共 5 页
字号:
        \counter[4]_net_1 ), .Y(N_23));
    XNOR2 un1_duty_cycle_r_0_I_135 (.A(\duty_cycle_r[15]_net_1 ), .B(
        \counter[15]_net_1 ), .Y(\DWACT_BL_EQUAL_0_E_0[0] ));
    DFN1C1 \counter[14]  (.D(\counter_5[14]_net_1 ), .CLK(GLA), .CLR(
        rst_c), .Q(\counter[14]_net_1 ));
    AND3 un1_duty_cycle_r_0_I_18 (.A(
        \DWACT_BL_EQUAL_0_DWACT_ANDTREE_E_3[0] ), .B(
        \DWACT_BL_EQUAL_0_DWACT_ANDTREE_E_2[1] ), .C(
        \DWACT_BL_EQUAL_0_DWACT_ANDTREE_E_0[2] ), .Y(
        \DWACT_BL_ANDTREE_0_DWACT_BL_ANDTREE_0_E[0] ));
    DFN1E0C1 \duty_cycle_r[14]  (.D(data[6]), .CLK(GLA), .CLR(rst_c), 
        .E(duty_cycle_r_48_e_net_1), .Q(\duty_cycle_r[14]_net_1 ));
    OR2A un1_duty_cycle_r_0_I_166 (.A(\counter[11]_net_1 ), .B(
        \duty_cycle_r[11]_net_1 ), .Y(N_60));
    AND2 un1_counter_0_I_194 (.A(\DWACT_BL_EQUAL_0_E_3[4] ), .B(
        \DWACT_BL_EQUAL_0_E_4[3] ), .Y(
        \DWACT_BL_EQUAL_0_DWACT_ANDTREE_E_3[1] ));
    AND2 un1_counter_0_I_19 (.A(\DWACT_BL_EQUAL_0_E_0[12] ), .B(
        \DWACT_BL_EQUAL_0_DWACT_ANDTREE_E_0[3] ), .Y(
        \DWACT_BL_ANDTREE_0_DWACT_BL_ANDTREE_0_E_0[1] ));
    NOR2A un1_counter_0_I_149 (.A(\clock_divide_r[15]_net_1 ), .B(
        \counter[15]_net_1 ), .Y(\ACT_LT4_E_0[0] ));
    NOR2B \counter_5[10]  (.A(I_56), .B(I_248_1), .Y(
        \counter_5[10]_net_1 ));
    AND3 un8_counter_I_62 (.A(\DWACT_FINC_E[0] ), .B(\DWACT_FINC_E[2] )
        , .C(\DWACT_FINC_E[5] ), .Y(\DWACT_FINC_E[6] ));
    OA1A un1_duty_cycle_r_0_I_96 (.A(N_110), .B(N_112), .C(N_111_0), 
        .Y(N_115));
    DFN1E0C1 \clock_divide_r[10]  (.D(data[2]), .CLK(GLA), .CLR(rst_c), 
        .E(N_251_i), .Q(\clock_divide_r[10]_net_1 ));
    AND3 un8_counter_I_169 (.A(\DWACT_FINC_E[15] ), .B(
        \DWACT_FINC_E[17] ), .C(\counter[24]_net_1 ), .Y(
        \DWACT_FINC_E[19] ));
    XNOR2 un1_counter_0_I_188 (.A(\counter[6]_net_1 ), .B(
        \clock_divide_r[6]_net_1 ), .Y(\DWACT_BL_EQUAL_0_E_5[1] ));
    XNOR2 un1_counter_0_I_135 (.A(\counter[15]_net_1 ), .B(
        \clock_divide_r[15]_net_1 ), .Y(\DWACT_BL_EQUAL_0_E_6[0] ));
    AND3 un8_counter_I_44 (.A(\DWACT_FINC_E[0] ), .B(\DWACT_FINC_E[2] )
        , .C(\DWACT_FINC_E[3] ), .Y(N_131));
    XNOR2 un1_duty_cycle_r_0_I_68 (.A(\duty_cycle_r[26]_net_1 ), .B(
        \counter[26]_net_1 ), .Y(\DWACT_BL_EQUAL_0_E_2[2] ));
    DFN1C1 \counter[31]  (.D(\counter_5[31]_net_1 ), .CLK(GLA), .CLR(
        rst_c), .Q(\counter[31]_net_1 ));
    XOR2 un8_counter_I_156 (.A(N_52), .B(\counter[23]_net_1 ), .Y(
        I_156));
    AO1C un1_duty_cycle_r_0_I_227 (.A(\duty_cycle_r[2]_net_1 ), .B(
        \counter[2]_net_1 ), .C(N_16), .Y(N_22));
    DFN1E0C1 \clock_divide_r[17]  (.D(data[1]), .CLK(GLA), .CLR(rst_c), 
        .E(clock_divide_r_24_e_net_1), .Q(\clock_divide_r[17]_net_1 ));
    NOR2B un8_counter_I_72 (.A(\DWACT_FINC_E[7] ), .B(
        \DWACT_FINC_E[6] ), .Y(N_111));
    XNOR2 un1_counter_0_I_137 (.A(\counter[17]_net_1 ), .B(
        \clock_divide_r[17]_net_1 ), .Y(\DWACT_BL_EQUAL_0_E_6[2] ));
    AO1C un1_duty_cycle_r_0_I_212 (.A(\duty_cycle_r[8]_net_1 ), .B(
        \counter[8]_net_1 ), .C(N_35), .Y(N_40_1));
    OR3C duty_cycle_r_48_e (.A(addr[2]), .B(duty_cycle_r_48_e_0_net_1), 
        .C(addr[0]), .Y(duty_cycle_r_48_e_net_1));
    DFN1E0C1 \duty_cycle_r[20]  (.D(data[4]), .CLK(GLA), .CLR(rst_c), 
        .E(duty_cycle_r_56_e_net_1), .Q(\duty_cycle_r[20]_net_1 ));
    OA1A un1_duty_cycle_r_0_I_54 (.A(\duty_cycle_r[30]_net_1 ), .B(
        \counter[30]_net_1 ), .C(N_133), .Y(N_137));
    XNOR2 un1_counter_0_I_138 (.A(\counter[18]_net_1 ), .B(
        \clock_divide_r[18]_net_1 ), .Y(\DWACT_BL_EQUAL_0_E_5[3] ));
    DFN1E0C1 \clock_divide_r[23]  (.D(data[7]), .CLK(GLA), .CLR(rst_c), 
        .E(clock_divide_r_24_e_net_1), .Q(\clock_divide_r[23]_net_1 ));
    DFN1E0C1 \clock_divide_r[19]  (.D(data[3]), .CLK(GLA), .CLR(rst_c), 
        .E(clock_divide_r_24_e_net_1), .Q(\clock_divide_r[19]_net_1 ));
    AOI1A un1_duty_cycle_r_0_I_80 (.A(\ACT_LT3_E[3] ), .B(
        \ACT_LT3_E[4] ), .C(\ACT_LT3_E[5] ), .Y(
        \DWACT_CMPLE_PO2_DWACT_COMP0_E_2[0] ));
    AND2 un8_counter_I_199 (.A(\DWACT_FINC_E[29] ), .B(
        \DWACT_FINC_E[30] ), .Y(\DWACT_FINC_E[24] ));
    GND GND_i_0 (.Y(GND_net_1));
    OA1A un1_counter_0_I_92 (.A(\counter[22]_net_1 ), .B(
        \clock_divide_r[22]_net_1 ), .C(N_107_0), .Y(N_111_1));
    OR2A un1_counter_0_I_211 (.A(\counter[9]_net_1 ), .B(
        \clock_divide_r[9]_net_1 ), .Y(N_39));
    DFN1C1 \counter[24]  (.D(\counter_5[24]_net_1 ), .CLK(GLA), .CLR(
        rst_c), .Q(\counter[24]_net_1 ));
    XNOR2 un1_counter_0_I_119 (.A(\counter[10]_net_1 ), .B(
        \clock_divide_r[10]_net_1 ), .Y(\DWACT_BL_EQUAL_0_E_7[0] ));
    DFN1E0C1 \duty_cycle_r[15]  (.D(data[7]), .CLK(GLA), .CLR(rst_c), 
        .E(duty_cycle_r_48_e_net_1), .Q(\duty_cycle_r[15]_net_1 ));
    XNOR2 un1_duty_cycle_r_0_I_191 (.A(\duty_cycle_r[8]_net_1 ), .B(
        \counter[8]_net_1 ), .Y(\DWACT_BL_EQUAL_0_E[3] ));
    AOI1A un1_counter_0_I_80 (.A(\ACT_LT3_E_0[3] ), .B(
        \ACT_LT3_E_0[4] ), .C(\ACT_LT3_E_0[5] ), .Y(
        \DWACT_CMPLE_PO2_DWACT_COMP0_E_3[0] ));
    XNOR2 un1_counter_0_I_5 (.A(\counter[28]_net_1 ), .B(
        \clock_divide_r[28]_net_1 ), .Y(\DWACT_BL_EQUAL_0_E_0[9] ));
    NOR2B \counter_5[4]  (.A(I_20), .B(I_248), .Y(\counter_5[4]_net_1 )
        );
    DFN1E0C1 \clock_divide_r[22]  (.D(data[6]), .CLK(GLA), .CLR(rst_c), 
        .E(clock_divide_r_24_e_net_1), .Q(\clock_divide_r[22]_net_1 ));
    XOR2 un8_counter_I_217 (.A(N_9), .B(\counter[30]_net_1 ), .Y(I_217)
        );
    XOR2 un8_counter_I_136 (.A(N_66), .B(\counter[21]_net_1 ), .Y(
        I_136));
    OR2A un1_counter_0_I_75 (.A(\clock_divide_r[25]_net_1 ), .B(
        \counter[25]_net_1 ), .Y(\ACT_LT3_E_0[1] ));
    NOR2A un1_counter_0_I_156 (.A(\counter[17]_net_1 ), .B(
        \clock_divide_r[17]_net_1 ), .Y(\ACT_LT4_E_0[7] ));
    AOI1A un1_counter_0_I_152 (.A(\ACT_LT4_E_0[0] ), .B(
        \ACT_LT4_E_0[1] ), .C(\ACT_LT4_E_0[2] ), .Y(\ACT_LT4_E_0[3] ));
    OR2A un1_duty_cycle_r_0_I_52 (.A(\counter[31]_net_1 ), .B(
        \duty_cycle_r[31]_net_1 ), .Y(N_135));
    NOR2B \counter_5[26]  (.A(I_186), .B(I_248_0), .Y(
        \counter_5[26]_net_1 ));
    OR3B duty_cycle_r_64_e (.A(addr[0]), .B(addr[1]), .C(
        un1_duty_cycle_r34_net_1), .Y(N_347_i));
    XNOR2 un1_duty_cycle_r_0_I_1 (.A(\duty_cycle_r[31]_net_1 ), .B(
        \counter[31]_net_1 ), .Y(\DWACT_BL_EQUAL_0_E[12] ));
    AND3 un1_duty_cycle_r_0_I_123 (.A(\DWACT_BL_EQUAL_0_E_1[0] ), .B(
        \DWACT_BL_EQUAL_0_E_1[1] ), .C(\DWACT_BL_EQUAL_0_E_1[2] ), .Y(
        \DWACT_BL_EQUAL_0_DWACT_ANDTREE_E_1[0] ));
    AO1C un1_counter_0_I_170 (.A(\clock_divide_r[11]_net_1 ), .B(
        \counter[11]_net_1 ), .C(N_62_0), .Y(N_64_0));
    NOR2B \counter_5[17]  (.A(I_105), .B(I_248_1), .Y(
        \counter_5[17]_net_1 ));
    XOR2 un8_counter_I_105 (.A(N_88), .B(\counter[17]_net_1 ), .Y(
        I_105));
    AO1 un1_duty_cycle_r_0_I_243 (.A(
        \DWACT_CMPLE_PO2_DWACT_COMP0_E_1[1] ), .B(
        \DWACT_CMPLE_PO2_DWACT_COMP0_E_0[2] ), .C(
        \DWACT_CMPLE_PO2_DWACT_COMP0_E_0[0] ), .Y(\DWACT_COMP0_E[2] ));
    OR2A un1_counter_0_I_205 (.A(\counter[7]_net_1 ), .B(
        \clock_divide_r[7]_net_1 ), .Y(N_33_0));
    OA1A un1_counter_0_I_58 (.A(N_136_1), .B(N_138_0), .C(N_137_0), .Y(
        N_141_1));
    XNOR2 un1_counter_0_I_121 (.A(\counter[17]_net_1 ), .B(
        \clock_divide_r[17]_net_1 ), .Y(\DWACT_BL_EQUAL_0_E_1[7] ));
    OR3B clock_divide_r_32_e (.A(addr[0]), .B(addr[1]), .C(
        un1_duty_cycle_r34_1_net_1), .Y(N_283_i));
    XNOR2 un1_duty_cycle_r_0_I_37 (.A(\duty_cycle_r[27]_net_1 ), .B(
        \counter[27]_net_1 ), .Y(\DWACT_BL_EQUAL_0_E_3[0] ));
    AO1C un1_duty_cycle_r_0_I_172 (.A(\duty_cycle_r[12]_net_1 ), .B(
        \counter[12]_net_1 ), .C(N_60), .Y(N_66_0));
    AND3 un8_counter_I_155 (.A(\DWACT_FINC_E[29] ), .B(
        \DWACT_FINC_E[13] ), .C(\DWACT_FINC_E[33] ), .Y(N_52));
    DFN1E0C1 \clock_divide_r[5]  (.D(data[5]), .CLK(GLA), .CLR(rst_c), 
        .E(clock_divide_r_8_e_net_1), .Q(\clock_divide_r[5]_net_1 ));
    AND3 un1_counter_0_I_125 (.A(\DWACT_BL_EQUAL_0_E_1[6] ), .B(
        \DWACT_BL_EQUAL_0_E_1[7] ), .C(\DWACT_BL_EQUAL_0_E_1[8] ), .Y(
        \DWACT_BL_EQUAL_0_DWACT_ANDTREE_E_1[2] ));
    NOR2B un8_counter_I_51 (.A(\counter[8]_net_1 ), .B(
        \DWACT_FINC_E[4] ), .Y(N_126));
    XNOR2 un1_duty_cycle_r_0_I_6 (.A(\duty_cycle_r[23]_net_1 ), .B(
        \counter[23]_net_1 ), .Y(\DWACT_BL_EQUAL_0_E_2[4] ));
    AND2 un1_duty_cycle_r_0_I_19 (.A(\DWACT_BL_EQUAL_0_E[12] ), .B(
        \DWACT_BL_EQUAL_0_DWACT_ANDTREE_E[3] ), .Y(
        \DWACT_BL_ANDTREE_0_DWACT_BL_ANDTREE_0_E[1] ));
    AND3 un1_duty_cycle_r_0_I_124 (.A(\DWACT_BL_EQUAL_0_E_1[3] ), .B(
        \DWACT_BL_EQUAL_0_E_0[4] ), .C(\DWACT_BL_EQUAL_0_E[5] ), .Y(
        \DWACT_BL_EQUAL_0_DWACT_ANDTREE_E_0[1] ));
    AO1 un1_counter_0_I_248_1 (.A(\DWACT_COMP0_E[1] ), .B(I_243), .C(
        \DWACT_COMP0_E[0] ), .Y(I_248_1));
    AND3 un8_counter_I_146 (.A(\DWACT_FINC_E[15] ), .B(
        \counter[21]_net_1 ), .C(\counter[22]_net_1 ), .Y(
        \DWACT_FINC_E[33] ));
    AO1C un1_duty_cycle_r_0_I_225 (.A(\counter[1]_net_1 ), .B(
        \duty_cycle_r[1]_net_1 ), .C(N_18), .Y(N_20));
    NOR2A un1_duty_cycle_r_0_I_223 (.A(\counter[0]_net_1 ), .B(
        \duty_cycle_r[0]_net_1 ), .Y(N_18));
    AO1C un1_counter_0_I_53 (.A(\clock_divide_r[28]_net_1 ), .B(
        \counter[28]_net_1 ), .C(N_134_0), .Y(N_136_1));
    OR2A un1_counter_0_I_207 (.A(\clock_divide_r[9]_net_1 ), .B(
        \counter[9]_net_1 ), .Y(N_35_0));
    DFN1E0C1 \clock_divide_r[18]  (.D(data[2]), .CLK(GLA), .CLR(rst_c), 
        .E(clock_divide_r_24_e_net_1), .Q(\clock_divide_r[18]_net_1 ));
    OR2A un1_duty_cycle_r_0_I_94 (.A(\duty_cycle_r[23]_net_1 ), .B(
        \counter[23]_net_1 ), .Y(N_113));
    AND3 un1_duty_cycle_r_0_I_139 (.A(\DWACT_BL_EQUAL_0_E_0[0] ), .B(
        \DWACT_BL_EQUAL_0_E_0[1] ), .C(\DWACT_BL_EQUAL_0_E_0[2] ), .Y(
        \DWACT_BL_EQUAL_0_DWACT_ANDTREE_E_0[0] ));
    XNOR2 un1_counter_0_I_34 (.A(\counter[31]_net_1 ), .B(
        \clock_divide_r[31]_net_1 ), .Y(\DWACT_BL_EQUAL_0_E_5[4] ));
    AO1C un1_duty_cycle_r_0_I_55 (.A(\duty_cycle_r[29]_net_1 ), .B(
        \counter[29]_net_1 ), .C(N_132), .Y(N_138));
    NOR2A un1_counter_0_I_89 (.A(\clock_divide_r[19]_net_1 ), .B(
        \counter[19]_net_1 ), .Y(N_108_2));
    AND3 un8_counter_I_135 (.A(\DWACT_FINC_E[28] ), .B(
        \DWACT_FINC_E[13] ), .C(\DWACT_FINC_E[15] ), .Y(N_66));
    AND3 un1_duty_cycle_r_0_I_69 (.A(\DWACT_BL_EQUAL_0_E_2[2] ), .B(
        \DWACT_BL_EQUAL_0_E_2[1] ), .C(\DWACT_BL_EQUAL_0_E_2[0] ), .Y(
        \DWACT_CMPLE_PO2_DWACT_COMP0_E_3[1] ));
    AND2A un1_counter_0_I_76 (.A(\clock_divide_r[25]_net_1 ), .B(
        \counter[25]_net_1 ), .Y(\ACT_LT3_E_0[2] ));
    OR2A un1_counter_0_I_166 (.A(\clock_divide_r[11]_net_1 ), .B(
        \counter[11]_net_1 ), .Y(N_60_0));
    OR2A un1_duty_cycle_r_0_I_211 (.A(\duty_cycle_r[9]_net_1 ), .B(
        \counter[9]_net_1 ), .Y(N_39_0));
    XNOR2 un1_counter_0_I_1 (.A(\counter[31]_net_1 ), .B(
        \clock_divide_r[31]_net_1 ), .Y(\DWACT_BL_EQUAL_0_E_0[12] ));
    AND2 un8_counter_I_162 (.A(\DWACT_FINC_E[15] ), .B(
        \DWACT_FINC_E[17] ), .Y(\DWACT_FINC_E[18] ));
    OR2A un1_duty_cycle_r_0_I_153 (.A(\counter[17]_net_1 ), .B(
        \duty_cycle_r[17]_net_1 ), .Y(\ACT_LT4_E[4] ));
    NOR2B \counter_5[13]  (.A(I_77), .B(I_248_1), .Y(
        \counter_5[13]_net_1 ));
    XOR2 un8_counter_I_77 (.A(N_108_0), .B(\counter[13]_net_1 ), .Y(
        I_77));
    AND3 un8_counter_I_16 (.A(\counter[0]_net_1 ), .B(
        \counter[1]_net_1 ), .C(\counter[2]_net_1 ), .Y(
        \DWACT_FINC_E[0] ));
    AND3 un1_duty_cycle_r_0_I_126 (.A(
        \DWACT_BL_EQUAL_0_DWACT_ANDTREE_E[2] ), .B(
        \DWACT_BL_EQUAL_0_DWACT_ANDTREE_E_0[1] ), .C(
        \DWACT_BL_EQUAL_0_DWACT_ANDTREE_E_1[0] ), .Y(
        \DWACT_CMPLE_PO2_DWACT_COMP0_E_1[1] ));
    DFN1C1 \counter[7]  (.D(\counter_5[7]_net_1 ), .CLK(GLA), .CLR(
        rst_c), .Q(\counter[7]_net_1 ));
    OR2A un1_counter_0_I_94 (.A(\counter[23]_net_1 ), .B(
        \clock_divide_r[23]_net_1 ), .Y(N_113_0));
    DFN1C1 \counter[30]  (.D(\counter_5[30]_net_1 ), .CLK(GLA), .CLR(
        rst_c), .Q(\counter[30]_net_1 ));
    XNOR2 un1_duty_cycle_r_0_I_117 (.A(\duty_cycle_r[13]_net_1 ), .B(
        \counter[13]_net_1 ), .Y(\DWACT_BL_EQUAL_0_E_1[3] ));
    OA1A un1_duty_cycle_r_0_I_92 (.A(\duty_cycle_r[22]_net_1 ), .B(
        \counter[22]_net_1 ), .C(N_107), .Y(N_111_0));
    AO1 un1_duty_cycle_r_0_I_109 (.A(
        \DWACT_CMPLE_PO0_DWACT_COMP0_E_0[1] ), .B(
        \DWACT_CMPLE_PO0_DWACT_COMP0_E_0[2] ), .C(
        \DWACT_CMPLE_PO0_DWACT_COMP0_E_0[0] ), .Y(\DWACT_COMP0_E_0[0] )
        );
    XOR2 un8_counter_I_38 (.A(N_136), .B(\counter[7]_net_1 ), .Y(I_38));
    DFN1E0C1 \duty_cycle_r[3]  (.D(data[3]), .CLK(GLA), .CLR(rst_c), 
        .E(

⌨️ 快捷键说明

复制代码 Ctrl + C
搜索代码 Ctrl + F
全屏模式 F11
切换主题 Ctrl + Shift + D
显示快捷键 ?
增大字号 Ctrl + =
减小字号 Ctrl + -