📄 control.srr
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********************************
Starting Arrival
Instance Reference Type Pin Net Time Slack
Clock
-----------------------------------------------------------------------------------
count[0] control|CLK48M DFN1C1 Q count[0] 0.476 2.479
count[1] control|CLK48M DFN1C1 Q count[1] 0.476 2.563
count[2] control|CLK48M DFN1C1 Q count[2] 0.476 2.761
count[3] control|CLK48M DFN1C1 Q count[3] 0.476 2.891
count[4] control|CLK48M DFN1C1 Q count[4] 0.476 3.025
count[5] control|CLK48M DFN1C1 Q count[5] 0.476 3.218
count[9] control|CLK48M DFN1C1 Q count[9] 0.476 3.504
count[8] control|CLK48M DFN1C1 Q count[8] 0.476 3.580
count[10] control|CLK48M DFN1C1 Q count[10] 0.476 3.633
count[6] control|CLK48M DFN1C1 Q count[6] 0.476 3.676
===================================================================================
Ending Points with Worst Slack
******************************
Starting Required
Instance Reference Type Pin Net Time Slack
Clock
--------------------------------------------------------------------------------
count[12] control|CLK48M DFN1C1 D I_73 9.590 2.479
count[11] control|CLK48M DFN1C1 D I_66 9.590 2.550
count[13] control|CLK48M DFN1C1 D I_77 9.590 2.550
count[14] control|CLK48M DFN1C1 D I_84 9.590 2.550
count[15] control|CLK48M DFN1C1 D I_91 9.590 2.550
count[16] control|CLK48M DFN1C1 D I_98 9.590 2.550
count[17] control|CLK48M DFN1C1 D I_105 9.590 2.550
count[18] control|CLK48M DFN1C1 D I_115 9.590 2.878
count[19] control|CLK48M DFN1C1 D I_122 9.590 2.878
count[20] control|CLK48M DFN1C1 D I_129 9.590 2.878
================================================================================
Worst Path Information
***********************
Path information for path number 1:
Requested Period: 10.000
- Setup time: 0.410
= Required time: 9.590
- Propagation time: 7.111
= Slack (non-critical) : 2.479
Number of logic level(s): 4
Starting point: count[0] / Q
Ending point: count[12] / D
The start point is clocked by control|CLK48M [rising] on pin CLK
The end point is clocked by control|CLK48M [rising] on pin CLK
Instance / Net Pin Pin Arrival No. of
Name Type Name Dir Delay Time Fan Out(s)
---------------------------------------------------------------------------------------------
count[0] DFN1C1 Q Out 0.476 0.476 -
count[0] Net - - 1.322 - 6
un3_count.I_16 AND3 A In - 1.799 -
un3_count.I_16 AND3 Y Out 0.389 2.187 -
un3_count.U1.DWACT_FINC_E[0] Net - - 1.650 - 8
un3_count.I_62 AND3 A In - 3.838 -
un3_count.I_62 AND3 Y Out 0.389 4.226 -
I_62 Net - - 1.486 - 7
un3_count.I_72 NOR2B B In - 5.713 -
un3_count.I_72 NOR2B Y Out 0.460 6.172 -
I_72 Net - - 0.313 - 1
un3_count.I_73 XOR2 A In - 6.485 -
un3_count.I_73 XOR2 Y Out 0.313 6.798 -
I_73 Net - - 0.313 - 1
count[12] DFN1C1 D In - 7.111 -
=============================================================================================
Total path delay (propagation time + setup) of 7.521 is 2.436(32.4%) logic and 5.085(67.6%) route.
====================================
Detailed Report for Clock: control|count_inferred_clock[20]
====================================
Starting Points with Worst Slack
********************************
Starting Arrival
Instance Reference Type Pin Net Time Slack
Clock
----------------------------------------------------------------------------------------------------------
addr_1[0] control|count_inferred_clock[20] DFN1C1 Q LED_c_c[0] 0.476 3.998
addr_1_0[1] control|count_inferred_clock[20] DFN1C1 Q LED_c_c_0[1] 0.476 4.639
addr_1_0[2] control|count_inferred_clock[20] DFN1C1 Q LED_c_c_0[2] 0.476 5.873
==========================================================================================================
Ending Points with Worst Slack
******************************
Starting Required
Instance Reference Type Pin Net Time Slack
Clock
-----------------------------------------------------------------------------------------------------------------------------------
addr_1[2] control|count_inferred_clock[20] DFN1C1 D addr_4[2] 9.690 3.998
addr_1_0[2] control|count_inferred_clock[20] DFN1C1 D addr_4[2] 9.690 3.998
addr_1_1[2] control|count_inferred_clock[20] DFN1C1 D addr_4[2] 9.690 3.998
addr_1_2[2] control|count_inferred_clock[20] DFN1C1 D addr_4[2] 9.690 3.998
addr_1[1] control|count_inferred_clock[20] DFN1C1 D addr_4[1] 9.690 5.112
addr_1_0[1] control|count_inferred_clock[20] DFN1C1 D addr_4[1] 9.690 5.112
addr_1[0] control|count_inferred_clock[20] DFN1C1 D addr_4.DWACT_ADD_CI_0_partial_sum[0] 9.590 6.082
addr_1_0[0] control|count_inferred_clock[20] DFN1C1 D addr_4.DWACT_ADD_CI_0_partial_sum[0] 9.590 6.082
addr_1_1[0] control|count_inferred_clock[20] DFN1C1 D addr_4.DWACT_ADD_CI_0_partial_sum[0] 9.590 6.082
===================================================================================================================================
Worst Path Information
***********************
Path information for path number 1:
Requested Period: 10.000
- Setup time: 0.310
= Required time: 9.690
- Propagation time: 5.692
= Slack (non-critical) : 3.998
Number of logic level(s): 3
Starting point: addr_1[0] / Q
Ending point: addr_1[2] / D
The start point is clocked by control|count_inferred_clock[20] [rising] on pin CLK
The end point is clocked by control|count_inferred_clock[20] [rising] on pin CLK
Instance / Net Pin Pin Arrival No. of
Name Type Name Dir Delay Time Fan Out(s)
---------------------------------------------------------------------------------------------------
addr_1[0] DFN1C1 Q Out 0.476 0.476 -
LED_c_c[0] Net - - 1.983 - 10
addr_4.I_1 AND2 A In - 2.460 -
addr_4.I_1 AND2 Y Out 0.384 2.843 -
addr_4.DWACT_ADD_CI_0_TMP[0] Net - - 0.527 - 2
addr_4.I_15 NOR2B A In - 3.370 -
addr_4.I_15 NOR2B Y Out 0.384 3.754 -
addr_4.DWACT_ADD_CI_0_g_array_1[0] Net - - 0.313 - 1
addr_4.I_14 XOR2 B In - 4.067 -
addr_4.I_14 XOR2 Y Out 0.681 4.747 -
addr_4[2] Net - - 0.944 - 4
addr_1[2] DFN1C1 D In - 5.692 -
===================================================================================================
Total path delay (propagation time + setup) of 6.002 is 2.234(37.2%) logic and 3.768(62.8%) route.
====================================
Detailed Report for Clock: control|count_inferred_clock[21]
====================================
Starting Points with Worst Slack
********************************
Starting Arrival
Instance Reference Type Pin Net Time Slack
Clock
--------------------------------------------------------------------------------------------------
bit0[2] control|count_inferred_clock[21] DFN1C1 Q bit0[2] 0.476 8.378
bit1[2] control|count_inferred_clock[21] DFN1C1 Q bit1[2] 0.476 8.378
bit0[0] control|count_inferred_clock[21] DFN1C1 Q bit0[0] 0.476 8.587
bit0[1] control|count_inferred_clock[21] DFN1C1 Q bit0[1] 0.476 8.587
bit1[0] control|count_inferred_clock[21] DFN1C1 Q bit1[0] 0.476 8.587
bit1[1] control|count_inferred_clock[21] DFN1C1 Q bit1[1] 0.476 8.587
==================================================================================================
Ending Points with Worst Slack
******************************
Starting Required
Instance Reference Type Pin Net Time Slack
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