sum_control.fit.rpt

采用Verilog HDL语言编写的步进电机位置系统

+--------------+------------+----------------------+-------------------+-------------------+-------+
; TTL          ; -          ; 1                    ; 0                 ; 0                 ; 1     ;
+--------------+------------+----------------------+-------------------+-------------------+-------+


+----------------------------------------------------------------------------+
; Dedicated Inputs I/O                                                       ;
+--------------+-------+-------+-------+--------------+------------+---------+
; Name         ; Pin # ; Type  ; VCCIO ; I/O Standard ; Input Vref ; Current ;
+--------------+-------+-------+-------+--------------+------------+---------+
; pulse_sum_in ; 83    ; Input ; --    ; TTL          ; -          ; 0 mA    ;
+--------------+-------+-------+-------+--------------+------------+---------+


+-----------------------------------------------+
; Output Pin Default Load For Reported TCO      ;
+--------------+-------+------------------------+
; I/O Standard ; Load  ; Termination Resistance ;
+--------------+-------+------------------------+
; LVTTL        ; 10 pF ; Not Available          ;
; LVCMOS       ; 10 pF ; Not Available          ;
; TTL          ; 0 pF  ; Not Available          ;
+--------------+-------+------------------------+


+-------------------------------------------------------------------------------------------------------+
; Fitter Resource Utilization by Entity                                                                 ;
+-------------------------------------+------------+------+---------------------------------------------+
; Compilation Hierarchy Node          ; Macrocells ; Pins ; Full Hierarchy Name                         ;
+-------------------------------------+------------+------+---------------------------------------------+
; |sum_control                        ; 71         ; 31   ; |sum_control                                ;
;    |lpm_counter:step_counter_rtl_0| ; 47         ; 0    ; |sum_control|lpm_counter:step_counter_rtl_0 ;
+-------------------------------------+------------+------+---------------------------------------------+


+----------------------------------------------------------------------------------------------+
; Control Signals                                                                              ;
+--------------+----------+---------+-------+--------+----------------------+------------------+
; Name         ; Location ; Fan-Out ; Usage ; Global ; Global Resource Used ; Global Line Name ;
+--------------+----------+---------+-------+--------+----------------------+------------------+
; pulse_sum_in ; PIN_83   ; 26      ; Clock ; yes    ; On                   ; --               ;
+--------------+----------+---------+-------+--------+----------------------+------------------+


+-----------------------------------------------------------------------------+
; Global & Other Fast Signals                                                 ;
+--------------+----------+---------+----------------------+------------------+
; Name         ; Location ; Fan-Out ; Global Resource Used ; Global Line Name ;
+--------------+----------+---------+----------------------+------------------+
; pulse_sum_in ; PIN_83   ; 26      ; On                   ; --               ;
+--------------+----------+---------+----------------------+------------------+


+---------------------------------------------------+
; Non-Global High Fan-Out Signals                   ;
+-----------------------------------------+---------+
; Name                                    ; Fan-Out ;
+-----------------------------------------+---------+
; Reset                                   ; 48      ;
; lpm_counter:step_counter_rtl_0|dffs[0]  ; 26      ;
; always0~217sexppiapart                  ; 25      ;
; add~19sexppiapart                       ; 25      ;
; always0~229sexppiapart                  ; 25      ;
; lpm_counter:step_counter_rtl_0|dffs[1]  ; 25      ;
; always0~297                             ; 25      ;
; always0~293                             ; 25      ;
; always0~289                             ; 25      ;
; always0~285                             ; 25      ;
; always0~281                             ; 25      ;
; always0~277                             ; 25      ;
; always0~273                             ; 25      ;
; always0~269                             ; 25      ;
; always0~265                             ; 25      ;
; always0~261                             ; 25      ;
; always0~257                             ; 25      ;
; always0~253                             ; 25      ;
; always0~249                             ; 25      ;
; always0~245                             ; 25      ;
; always0~241                             ; 25      ;
; always0~237                             ; 25      ;
; always0~209                             ; 25      ;
; lpm_counter:step_counter_rtl_0|dffs[3]  ; 24      ;
; lpm_counter:step_counter_rtl_0|dffs[2]  ; 24      ;
; lpm_counter:step_counter_rtl_0|dffs[4]  ; 23      ;
; lpm_counter:step_counter_rtl_0|dffs[5]  ; 22      ;
; lpm_counter:step_counter_rtl_0|dffs[6]  ; 21      ;
; lpm_counter:step_counter_rtl_0|dffs[7]  ; 20      ;
; lpm_counter:step_counter_rtl_0|dffs[8]  ; 19      ;
; lpm_counter:step_counter_rtl_0|dffs[9]  ; 18      ;
; lpm_counter:step_counter_rtl_0|dffs[10] ; 17      ;
; lpm_counter:step_counter_rtl_0|dffs[11] ; 16      ;
; lpm_counter:step_counter_rtl_0|dffs[12] ; 15      ;
; lpm_counter:step_counter_rtl_0|dffs[13] ; 14      ;