⭐ 欢迎来到虫虫下载站! | 📦 资源下载 📁 资源专辑 ℹ️ 关于我们
⭐ 虫虫下载站

📄 pulse_16.fit.rpt

📁 采用Verilog HDL语言编写的步进电机位置系统
💻 RPT
📖 第 1 页 / 共 3 页
字号:
; 98       ; 9          ; --       ; pulse_16_out[11] ; output ; TTL          ;         ; N               ;
; 99       ; 10         ; --       ; pulse_16_out[12] ; output ; TTL          ;         ; N               ;
; 100      ; 11         ; --       ; pulse_16_out[13] ; output ; TTL          ;         ; N               ;
+----------+------------+----------+------------------+--------+--------------+---------+-----------------+


+-----------------------------------------------+
; Output Pin Default Load For Reported TCO      ;
+--------------+-------+------------------------+
; I/O Standard ; Load  ; Termination Resistance ;
+--------------+-------+------------------------+
; LVTTL        ; 10 pF ; Not Available          ;
; LVCMOS       ; 10 pF ; Not Available          ;
; TTL          ; 0 pF  ; Not Available          ;
+--------------+-------+------------------------+


+----------------------------------------------------------------------+
; Fitter Resource Utilization by Entity                                ;
+----------------------------+------------+------+---------------------+
; Compilation Hierarchy Node ; Macrocells ; Pins ; Full Hierarchy Name ;
+----------------------------+------------+------+---------------------+
; |pulse_16                  ; 16         ; 37   ; |pulse_16           ;
+----------------------------+------------+------+---------------------+


+---------------------------------+
; Non-Global High Fan-Out Signals ;
+------------------+--------------+
; Name             ; Fan-Out      ;
+------------------+--------------+
; counter_data[0]  ; 16           ;
; Reset            ; 16           ;
; counter_data[1]  ; 15           ;
; counter_data[2]  ; 14           ;
; counter_data[3]  ; 13           ;
; counter_data[4]  ; 12           ;
; counter_data[5]  ; 11           ;
; counter_data[6]  ; 10           ;
; counter_data[7]  ; 9            ;
; counter_data[8]  ; 8            ;
; counter_data[9]  ; 7            ;
; counter_data[10] ; 6            ;
; counter_data[11] ; 5            ;
; counter_data[12] ; 4            ;
; counter_data[13] ; 3            ;
; counter_data[14] ; 2            ;
; counter_data[15] ; 1            ;
; pulse_16_out~262 ; 1            ;
; pulse_16_out~260 ; 1            ;
; pulse_16_out~258 ; 1            ;
; pulse_16_out~256 ; 1            ;
; pulse_16_out~254 ; 1            ;
; pulse_16_out~252 ; 1            ;
; pulse_16_out~250 ; 1            ;
; pulse_16_out~248 ; 1            ;
; pulse_16_out~246 ; 1            ;
; pulse_16_out~244 ; 1            ;
; pulse_16_out~242 ; 1            ;
; pulse_16_out~240 ; 1            ;
; pulse_16_out~238 ; 1            ;
; pulse_16_out~236 ; 1            ;
; pulse_16_out~234 ; 1            ;
; pulse_16_out~232 ; 1            ;
+------------------+--------------+


+------------------------------------------------+
; Interconnect Usage Summary                     ;
+----------------------------+-------------------+
; Interconnect Resource Type ; Usage             ;
+----------------------------+-------------------+
; Output enables             ; 0 / 6 ( 0 % )     ;
; PIA buffers                ; 19 / 144 ( 13 % ) ;
+----------------------------+-------------------+


+----------------------------------------------------------------------+
; LAB Macrocells                                                       ;
+----------------------------------------+-----------------------------+
; Number of Macrocells  (Average = 4.00) ; Number of LABs  (Total = 2) ;
+----------------------------------------+-----------------------------+
; 0                                      ; 2                           ;
; 1                                      ; 1                           ;
; 2                                      ; 0                           ;
; 3                                      ; 0                           ;
; 4                                      ; 0                           ;
; 5                                      ; 0                           ;
; 6                                      ; 0                           ;
; 7                                      ; 0                           ;
; 8                                      ; 0                           ;
; 9                                      ; 0                           ;
; 10                                     ; 0                           ;
; 11                                     ; 0                           ;
; 12                                     ; 0                           ;
; 13                                     ; 0                           ;
; 14                                     ; 0                           ;
; 15                                     ; 1                           ;
+----------------------------------------+-----------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Logic Cell Interconnection                                                                                                                                                                                                                                                                                                        ;
+-----+------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------+
; LAB ; Logic Cell ; Input                                                                                                                                                                                                                                                                                       ; Output           ;
+-----+------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------+
;  A  ; LC7        ; counter_data[1], Reset, counter_data[0]                                                                                                                                                                                                                                                     ; pulse_16_out[14] ;
;  A  ; LC9        ; counter_data[2], counter_data[1], Reset, counter_data[0]                                                                                                                                                                                                                                    ; pulse_16_out[13] ;
;  A  ; LC10       ; counter_data[3], counter_data[2], counter_data[1], Reset, counter_data[0]                                                                                                                                                                                                                   ; pulse_16_out[12] ;
;  A  ; LC11       ; counter_data[4], counter_data[3], counter_data[2], counter_data[1], Reset, counter_data[0]                                                                                                                                                                                                  ; pulse_16_out[11] ;
;  A  ; LC16       ; counter_data[5], counter_data[4], counter_data[3], counter_data[2], counter_data[1], Reset, counter_data[0]                                                                                                                                                                                 ; pulse_16_out[10] ;
;  A  ; LC15       ; counter_data[6], counter_data[5], counter_data[4], counter_data[3], counter_data[2], counter_data[1], Reset, counter_data[0]                                                                                                                                                                ; pulse_16_out[9]  ;
;  A  ; LC14       ; counter_data[7], counter_data[6], counter_data[5], counter_data[4], counter_data[3], counter_data[2], counter_data[1], Reset, counter_data[0]                                                                                                                                               ; pulse_16_out[8]  ;
;  A  ; LC13       ; counter_data[8], counter_data[7], counter_data[6], counter_data[5], counter_data[4], counter_data[3], counter_data[2], counter_data[1], Reset, counter_data[0]                                                                                                                              ; pulse_16_out[7]  ;
;  A  ; LC12       ; counter_data[9], counter_data[8], counter_data[7], counter_data[6], counter_data[5], counter_data[4], counter_data[3], counter_data[2], counter_data[1], Reset, counter_data[0]                                                                                                             ; pulse_16_out[6]  ;
;  A  ; LC6        ; counter_data[10], counter_data[9], counter_data[8], counter_data[7], counter_data[6], counter_data[5], counter_data[4], counter_data[3], counter_data[2], counter_data[1], Reset, counter_data[0]                                                                                           ; pulse_16_out[5]  ;
;  A  ; LC5        ; counter_data[11], counter_data[10], counter_data[9], counter_data[8], counter_data[7], counter_data[6], counter_data[5], counter_data[4], counter_data[3], counter_data[2], counter_data[1], Reset, counter_data[0]                                                                         ; pulse_16_out[4]  ;
;  A  ; LC4        ; counter_data[12], counter_data[11], counter_data[10], counter_data[9], counter_data[8], counter_data[7], counter_data[6], counter_data[5], counter_data[4], counter_data[3], counter_data[2], counter_data[1], Reset, counter_data[0]                                                       ; pulse_16_out[3]  ;
;  A  ; LC3        ; counter_data[13], counter_data[12], counter_data[11], counter_data[10], counter_data[9], counter_data[8], counter_data[7], counter_data[6], counter_data[5], counter_data[4], counter_data[3], counter_data[2], counter_data[1], Reset, counter_data[0]                                     ; pulse_16_out[2]  ;
;  A  ; LC2        ; counter_data[14], counter_data[13], counter_data[12], counter_data[11], counter_data[10], counter_data[9], counter_data[8], counter_data[7], counter_data[6], counter_data[5], counter_data[4], counter_data[3], counter_data[2], counter_data[1], Reset, counter_data[0]                   ; pulse_16_out[1]  ;
;  A  ; LC1        ; counter_data[14], counter_data[13], counter_data[12], counter_data[11], counter_data[10], counter_data[9], counter_data[8], counter_data[7], counter_data[6], counter_data[5], counter_data[4], counter_data[3], counter_data[2], counter_data[1], Reset, counter_data[0], counter_data[15] ; pulse_16_out[0]  ;
;  B  ; LC17       ; Reset, counter_data[0]                                                                                                                                                                                                                                                                      ; pulse_16_out[15] ;
+-----+------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------+


+-----------------+
; Fitter Messages ;
+-----------------+
Info: *******************************************************************
Info: Running Quartus II Fitter
    Info: Version 4.2 Build 157 12/07/2004 SJ Full Version
    Info: Processing started: Wed Jul 19 21:11:38 2006
Info: Command: quartus_fit --import_settings_files=off --export_settings_files=off pulse_16 -c pulse_16
Info: Automatically selected device EPM7064STC100-5 for design pulse_16
Info: Fitting design with smaller device may be possible, but smaller device must be specified
Info: Quartus II Fitter was successful. 0 errors, 0 warnings
    Info: Processing ended: Wed Jul 19 21:11:40 2006
    Info: Elapsed time: 00:00:03


⌨️ 快捷键说明

复制代码 Ctrl + C
搜索代码 Ctrl + F
全屏模式 F11
切换主题 Ctrl + Shift + D
显示快捷键 ?
增大字号 Ctrl + =
减小字号 Ctrl + -