second_pulse_latch.map.eqn

采用Verilog HDL语言编写的步进电机位置系统

--C3L71 is lpm_add_sub:add_rtl_0|addcore:adder[1]|prop_node[3]~100
C3L71_p1_out = A1L15Q & A1L94Q;
C3L71_p2_out = A1L15Q & !acceleration[13];
C3L71_p3_out = A1L94Q & !acceleration[14];
C3L71_p4_out = !acceleration[13] & !acceleration[14];
C3L71_or_out = C3L71_p1_out # C3L71_p2_out # C3L71_p3_out # C3L71_p4_out;
C3L71 = C3L71_or_out;


--C2L3 is lpm_add_sub:add_rtl_0|addcore:adder[0]|prop_node[3]~77
C2L3_p1_out = A1L53Q & A1L33Q;
C2L3_p2_out = A1L53Q & !acceleration[5];
C2L3_p3_out = A1L33Q & !acceleration[6];
C2L3_p4_out = !acceleration[5] & !acceleration[6];
C2L3_or_out = C2L3_p1_out # C2L3_p2_out # C2L3_p3_out # C2L3_p4_out;
C2L3 = C2L3_or_out;


--C6L41 is lpm_add_sub:add_rtl_1|addcore:adder[0]|prop_node[3]~77
C6L41_p1_out = A1L73Q & A1L53Q;
C6L41_p2_out = A1L73Q & acceleration[6];
C6L41_p3_out = A1L53Q & acceleration[7];
C6L41_p4_out = acceleration[6] & acceleration[7];
C6L41_or_out = C6L41_p1_out # C6L41_p2_out # C6L41_p3_out # C6L41_p4_out;
C6L41 = C6L41_or_out;


--C6L7 is lpm_add_sub:add_rtl_1|addcore:adder[0]|genr_node[3]~88
C6L7_p1_out = A1L73Q & acceleration[7];
C6L7_p2_out = A1L73Q & A1L53Q & acceleration[6];
C6L7_p3_out = acceleration[7] & A1L53Q & acceleration[6];
C6L7_or_out = C6L7_p1_out # C6L7_p2_out # C6L7_p3_out;
C6L7 = C6L7_or_out;


--C7L1 is lpm_add_sub:add_rtl_1|addcore:adder[1]|g2cp[1]~17
C7L1_p1_out = A1L94Q & acceleration[13];
C7L1_p2_out = A1L94Q & A1L74Q & acceleration[12];
C7L1_p3_out = acceleration[13] & A1L74Q & acceleration[12];
C7L1_or_out = C7L1_p1_out # C7L1_p2_out # C7L1_p3_out;
C7L1 = C7L1_or_out;


--C7L2 is lpm_add_sub:add_rtl_1|addcore:adder[1]|g2cp[2]~23
C7L2_p0_out = A1L74Q & acceleration[12] & acceleration[13] & acceleration[14];
C7L2_p1_out = A1L15Q & A1L94Q & A1L74Q & acceleration[12];
C7L2_p2_out = A1L15Q & A1L74Q & acceleration[12] & acceleration[13];
C7L2_p3_out = A1L94Q & acceleration[13] & acceleration[14];
C7L2_p4_out = A1L94Q & A1L74Q & acceleration[12] & acceleration[14];
C7L2_or_out = C7L3 # C7L2_p0_out # C7L2_p1_out # C7L2_p2_out # C7L2_p3_out # C7L2_p4_out;
C7L2 = C7L2_or_out;


--C7L7 is lpm_add_sub:add_rtl_1|addcore:adder[1]|gcp[2]~12
C7L7_p0_out = A1L93Q & acceleration[8] & acceleration[9] & acceleration[10];
C7L7_p1_out = A1L34Q & A1L14Q & A1L93Q & acceleration[8];
C7L7_p2_out = A1L34Q & A1L93Q & acceleration[8] & acceleration[9];
C7L7_p3_out = A1L14Q & acceleration[9] & acceleration[10];
C7L7_p4_out = A1L14Q & A1L93Q & acceleration[8] & acceleration[10];
C7L7_or_out = C7L8 # C7L7_p0_out # C7L7_p1_out # C7L7_p2_out # C7L7_p3_out # C7L7_p4_out;
C7L7 = C7L7_or_out;


--C6L5 is lpm_add_sub:add_rtl_1|addcore:adder[0]|g2cp[2]~23
C6L5_p0_out = A1L13Q & acceleration[4] & acceleration[5] & acceleration[6];
C6L5_p1_out = A1L53Q & A1L33Q & A1L13Q & acceleration[4];
C6L5_p2_out = A1L53Q & A1L13Q & acceleration[4] & acceleration[5];
C6L5_p3_out = A1L33Q & acceleration[5] & acceleration[6];
C6L5_p4_out = A1L33Q & A1L13Q & acceleration[4] & acceleration[6];
C6L5_or_out = C6L6 # C6L5_p0_out # C6L5_p1_out # C6L5_p2_out # C6L5_p3_out # C6L5_p4_out;
C6L5 = C6L5_or_out;


--A1L32Q is second_pulse_out[0]~reg0
A1L32Q_p1_out = !Reset & acceleration[0] & !A1L32Q;
A1L32Q_p2_out = !Reset & !acceleration[0] & A1L32Q;
A1L32Q_or_out = A1L32Q_p1_out # A1L32Q_p2_out;
A1L32Q_reg_input = A1L32Q_or_out;
A1L32Q = DFFE(A1L32Q_reg_input, GLOBAL(Clk_1Hz), , , );


--C7L4 is lpm_add_sub:add_rtl_1|addcore:adder[1]|g4~17
C7L4_p1_out = acceleration[11] & A1L54Q;
C7L4_p0_out = acceleration[11] & !A1L54Q & acceleration[9] & A1L93Q & acceleration[8] & acceleration[10];
C7L4_p2_out = A1L34Q & acceleration[11] & !A1L54Q & acceleration[9] & A1L93Q & acceleration[8];
C7L4_p3_out = acceleration[11] & !A1L54Q & acceleration[9] & A1L14Q & acceleration[10];
C7L4_p4_out = acceleration[11] & !A1L54Q & A1L93Q & acceleration[8] & A1L14Q & acceleration[10];
C7L4_or_out = C7L6 # C7L4_p0_out # C7L4_p2_out # C7L4_p3_out # C7L4_p4_out;
C7L4 = C7L4_p1_out $ C7L4_or_out;


--F21L1 is lpm_add_sub:add_rtl_1|addcore:adder[0]|a_csnbuffer:result_node|sout_node[3]~15
F21L1 = EXP(!A1L92Q & acceleration[3]);


--F21L2 is lpm_add_sub:add_rtl_1|addcore:adder[0]|a_csnbuffer:result_node|sout_node[3]~16
F21L2 = EXP(!acceleration[3] & A1L92Q);


--F21L3 is lpm_add_sub:add_rtl_1|addcore:adder[0]|a_csnbuffer:result_node|sout_node[3]~17
F21L3_p1_out = F21L1 & F21L2;
F21L3_p0_out = A1L32Q & acceleration[0] & acceleration[2] & acceleration[1];
F21L3_p2_out = A1L52Q & A1L72Q & A1L32Q & acceleration[0];
F21L3_p3_out = A1L52Q & A1L32Q & acceleration[0] & acceleration[2];
F21L3_p4_out = A1L72Q & A1L32Q & acceleration[0] & acceleration[1];
F21L3_or_out = F21L4 # F21L3_p0_out # F21L3_p2_out # F21L3_p3_out # F21L3_p4_out;
F21L3 = F21L3_p1_out $ F21L3_or_out;


--F21L5 is lpm_add_sub:add_rtl_1|addcore:adder[0]|a_csnbuffer:result_node|sout_node[4]~24
F21L5 = EXP(!acceleration[3] & !A1L92Q);


--F21L6 is lpm_add_sub:add_rtl_1|addcore:adder[0]|a_csnbuffer:result_node|sout_node[4]~25
F21L6 = EXP(!A1L72Q & !acceleration[2]);


--F21L7 is lpm_add_sub:add_rtl_1|addcore:adder[0]|a_csnbuffer:result_node|sout_node[4]~26
F21L7 = EXP(!A1L52Q & !acceleration[1]);


--F21L8 is lpm_add_sub:add_rtl_1|addcore:adder[0]|a_csnbuffer:result_node|sout_node[4]~27
F21L8 = EXP(A1L13Q & !acceleration[4]);


--F21L9 is lpm_add_sub:add_rtl_1|addcore:adder[0]|a_csnbuffer:result_node|sout_node[4]~28
F21L9 = EXP(acceleration[4] & !A1L13Q);


--F21L01 is lpm_add_sub:add_rtl_1|addcore:adder[0]|a_csnbuffer:result_node|sout_node[4]~29
F21L01_p1_out = F21L8 & F21L9;
F21L01_p0_out = F21L5 & F21L6 & F21L7 & A1L32Q & acceleration[0];
F21L01_p2_out = acceleration[3] & A1L92Q;
F21L01_p3_out = F21L5 & A1L72Q & acceleration[2];
F21L01_p4_out = F21L5 & F21L6 & A1L52Q & acceleration[1];
F21L01_or_out = F21L01_p0_out # F21L01_p2_out # F21L01_p3_out # F21L01_p4_out;
F21L01 = F21L01_p1_out $ F21L01_or_out;


--C6L1 is lpm_add_sub:add_rtl_1|addcore:adder[0]|bg_out~29
C6L1 = EXP(!A1L33Q & !acceleration[5]);


--C6L2 is lpm_add_sub:add_rtl_1|addcore:adder[0]|bg_out~30
C6L2 = EXP(!A1L13Q & !acceleration[4]);


--C6L3 is lpm_add_sub:add_rtl_1|addcore:adder[0]|bg_out~39
C6L3_p0_out = C6L1 & C6L2 & F21L5 & F21L6 & F21L7 & A1L32Q & acceleration[0];
C6L3_p1_out = C6L1 & A1L13Q & acceleration[4];
C6L3_p2_out = C6L1 & C6L2 & A1L92Q & acceleration[3];
C6L3_p3_out = C6L1 & C6L2 & F21L5 & A1L72Q & acceleration[2];
C6L3_p4_out = C6L1 & C6L2 & F21L5 & F21L6 & A1L52Q & acceleration[1];
C6L3_or_out = C6L4 # C6L3_p0_out # C6L3_p1_out # C6L3_p2_out # C6L3_p3_out # C6L3_p4_out;
C6L3 = C6L3_or_out;


--F21L11 is lpm_add_sub:add_rtl_1|addcore:adder[0]|a_csnbuffer:result_node|sout_node[5]~40
F21L11 = EXP(A1L33Q & !acceleration[5]);


--F21L21 is lpm_add_sub:add_rtl_1|addcore:adder[0]|a_csnbuffer:result_node|sout_node[5]~41
F21L21 = EXP(acceleration[5] & !A1L33Q);


--F21L31 is lpm_add_sub:add_rtl_1|addcore:adder[0]|a_csnbuffer:result_node|sout_node[5]~42
F21L31_p1_out = F21L11 & F21L21;
F21L31_p0_out = C6L2 & F21L5 & F21L6 & F21L7 & A1L32Q & acceleration[0];
F21L31_p2_out = C6L2 & acceleration[3] & A1L92Q;
F21L31_p3_out = C6L2 & F21L5 & A1L72Q & acceleration[2];
F21L31_p4_out = C6L2 & F21L5 & F21L6 & A1L52Q & acceleration[1];
F21L31_or_out = F21L41 # F21L31_p0_out # F21L31_p2_out # F21L31_p3_out # F21L31_p4_out;
F21L31 = F21L31_p1_out $ F21L31_or_out;


--F51L1 is lpm_add_sub:add_rtl_1|addcore:adder[1]|a_csnbuffer:result_node|sout_node[1]~7
F51L1 = EXP(A1L14Q & !acceleration[9]);


--F51L2 is lpm_add_sub:add_rtl_1|addcore:adder[1]|a_csnbuffer:result_node|sout_node[1]~8
F51L2 = EXP(acceleration[9] & !A1L14Q);


--F51L3 is lpm_add_sub:add_rtl_1|addcore:adder[1]|a_csnbuffer:result_node|sout_node[1]~9
F51L3_p1_out = F51L1 & F51L2;
F51L3_p2_out = C6L7 & C7L9;
F51L3_p3_out = C6L41 & C6L3 & C7L9;
F51L3_p4_out = A1L93Q & acceleration[8];
F51L3_or_out = F51L3_p2_out # F51L3_p3_out # F51L3_p4_out;
F51L3 = F51L3_p1_out $ F51L3_or_out;


--F21L51 is lpm_add_sub:add_rtl_1|addcore:adder[0]|a_csnbuffer:result_node|sout_node[6]~54
F21L51 = EXP(A1L53Q & !acceleration[6]);


--F21L61 is lpm_add_sub:add_rtl_1|addcore:adder[0]|a_csnbuffer:result_node|sout_node[6]~55
F21L61 = EXP(acceleration[6] & !A1L53Q);


--F21L71 is lpm_add_sub:add_rtl_1|addcore:adder[0]|a_csnbuffer:result_node|sout_node[6]~56
F21L71_p1_out = F21L51 & F21L61;
F21L71_p0_out = C6L1 & C6L2 & F21L5 & F21L6 & F21L7 & A1L32Q & acceleration[0];
F21L71_p2_out = C6L1 & C6L2 & acceleration[3] & A1L92Q;
F21L71_p3_out = C6L1 & C6L2 & F21L5 & A1L72Q & acceleration[2];
F21L71_p4_out = C6L1 & C6L2 & F21L5 & F21L6 & A1L52Q & acceleration[1];
F21L71_or_out = F21L81 # F21L71_p0_out # F21L71_p2_out # F21L71_p3_out # F21L71_p4_out;
F21L71 = F21L71_p1_out $ F21L71_or_out;


--F51L7 is lpm_add_sub:add_rtl_1|addcore:adder[1]|a_csnbuffer:result_node|sout_node[3]~15
F51L7 = EXP(A1L54Q & !acceleration[11]);


--F51L8 is lpm_add_sub:add_rtl_1|addcore:adder[1]|a_csnbuffer:result_node|sout_node[3]~16
F51L8 = EXP(acceleration[11] & !A1L54Q);


--F51L9 is lpm_add_sub:add_rtl_1|addcore:adder[1]|a_csnbuffer:result_node|sout_node[3]~17
F51L9_p1_out = F51L7 & F51L8;
F51L9_p2_out = C6L7 & F6L5 & F6L2 & C7L9;
F51L9_p3_out = C6L41 & C6L3 & F6L5 & F6L2 & C7L9;
F51L9_or_out = F51L9_p2_out # F51L9_p3_out # C7L7;
F51L9 = F51L9_p1_out $ F51L9_or_out;


--C6L8 is lpm_add_sub:add_rtl_1|addcore:adder[0]|p2c[2]~25
C6L8 = EXP(acceleration[1] & A1L32Q & acceleration[0]);


--C6L9 is lpm_add_sub:add_rtl_1|addcore:adder[0]|p2c[2]~26
C6L9 = EXP(A1L32Q & acceleration[0]);


--C6L01 is lpm_add_sub:add_rtl_1|addcore:adder[0]|p2c[2]~27
C6L01 = EXP(acceleration[3] & A1L92Q);


--C6L11 is lpm_add_sub:add_rtl_1|addcore:adder[0]|p2c[2]~28
C6L11 = EXP(A1L72Q & acceleration[2]);


--C6L21 is lpm_add_sub:add_rtl_1|addcore:adder[0]|p2c[2]~34
C6L21_p0_out = C6L01 & C6L11 & C6L9 & !acceleration[1];
C6L21_p1_out = !A1L13Q & !acceleration[4];
C6L21_p2_out = !acceleration[3] & !A1L92Q;
C6L21_p3_out = C6L01 & !A1L72Q & !acceleration[2];
C6L21_p4_out = C6L01 & C6L11 & C6L8 & !A1L52Q;
C6L21_or_out = C6L31 # C6L21_p0_out # C6L21_p1_out # C6L21_p2_out # C6L21_p3_out # C6L21_p4_out;
C6L21 = C6L21_or_out;


--F51L01 is lpm_add_sub:add_rtl_1|addcore:adder[1]|a_csnbuffer:result_node|sout_node[4]~23
F51L01 = EXP(A1L74Q & !acceleration[12]);


--F51L11 is lpm_add_sub:add_rtl_1|addcore:adder[1]|a_csnbuffer:result_node|sout_node[4]~24
F51L11 = EXP(acceleration[12] & !A1L74Q);


--F51L21 is lpm_add_sub:add_rtl_1|addcore:adder[1]|a_csnbuffer:result_node|sout_node[4]~25
F51L21_p1_out = F51L01 & F51L11;
F51L21_p2_out = C6L7 & F6L8 & F6L5 & F6L2 & C7L9;
F51L21_p3_out = C6L41 & C6L3 & F6L8 & F6L5 & F6L2 & C7L9;
F51L21_or_out = F51L21_p2_out # F51L21_p3_out # C7L4;
F51L21 = F51L21_p1_out $ F51L21_or_out;


--F51L4 is lpm_add_sub:add_rtl_1|addcore:adder[1]|a_csnbuffer:result_node|sout_node[2]~31
F51L4 = EXP(A1L34Q & !acceleration[10]);


--F51L5 is lpm_add_sub:add_rtl_1|addcore:adder[1]|a_csnbuffer:result_node|sout_node[2]~32
F51L5 = EXP(acceleration[10] & !A1L34Q);


--F51L6 is lpm_add_sub:add_rtl_1|addcore:adder[1]|a_csnbuffer:result_node|sout_node[2]~33
F51L6_p1_out = F51L4 & F51L5;
F51L6_p0_out = A1L14Q & acceleration[9];
F51L6_p2_out = C6L7 & F6L2 & C7L9;
F51L6_p3_out = C6L41 & C6L3 & F6L2 & C7L9;
F51L6_p4_out = F6L2 & A1L93Q & acceleration[8];
F51L6_or_out = F51L6_p0_out # F51L6_p2_out # F51L6_p3_out # F51L6_p4_out;
F51L6 = F51L6_p1_out $ F51L6_or_out;


--A1L52Q is second_pulse_out[1]~reg0
A1L52Q_p0_out = !Reset & !acceleration[0] & acceleration[1] & !A1L52Q;
A1L52Q_p1_out = A1L32Q & !acceleration[16] & !Reset & acceleration[0] & acceleration[1] & A1L52Q;
A1L52Q_p2_out = !A1L32Q & !acceleration[16] & !Reset & !acceleration[1] & A1L52Q;
A1L52Q_p3_out = !A1L32Q & !acceleration[16] & !Reset & acceleration[1] & !A1L52Q;
A1L52Q_p4_out = !Reset & !acceleration[0] & !acceleration[1] & A1L52Q;
A1L52Q_or_out = A1L55 # A1L52Q_p0_out # A1L52Q_p1_out # A1L52Q_p2_out # A1L52Q_p3_out # A1L52Q_p4_out;
A1L52Q_reg_input = A1L52Q_or_out;
A1L52Q = DFFE(A1L52Q_reg_input, GLOBAL(Clk_1Hz), , , );


--F51L31 is lpm_add_sub:add_rtl_1|addcore:adder[1]|a_csnbuffer:result_node|sout_node[5]~40
F51L31 = EXP(A1L94Q & !acceleration[13]);


--F51L41 is lpm_add_sub:add_rtl_1|addcore:adder[1]|a_csnbuffer:result_node|sout_node[5]~41
F51L41 = EXP(acceleration[13] & !A1L94Q);


--F51L51 is lpm_add_sub:add_rtl_1|addcore:adder[1]|a_csnbuffer:result_node|sout_node[5]~42
F51L51_p1_out = F51L31 & F51L41;
F51L51_p0_out = A1L74Q & acceleration[12];
F51L51_p2_out = C7L4 & F6L11;
F51L51_p3_out = C6L7 & F6L11 & F6L8 & F6L5 & F6L2 & C7L9;
F51L51_p4_out = C6L41 & C6L3 & F6L11 & F6L8 & F6L5 & F6L2 & C7L9;
F51L51_or_out = F51L51_p0_out # F51L51_p2_out # F51L51_p3_out # F51L51_p4_out;
F51L51 = F51L51_p1_out $ F51L51_or_out;


--F51L61 is lpm_add_sub:add_rtl_1|addcore:adder[1]|a_csnbuffer:result_node|sout_node[6]~49
F51L61 = EXP(A1L15Q & !acceleration[14]);


--F51L71 is lpm_add_sub:add_rtl_1|addcore:adder[1]|a_csnbuffer:result_node|sout_node[6]~50
F51L71 = EXP(acceleration[14] & !A1L15Q);


--F51L81 is lpm_add_sub:add_rtl_1|addcore:adder[1]|a_csnbuffer:result_node|sout_node[6]~51
F51L81_p1_out = F51L61 & F51L71;