phase_detector_top.hif

使用virlog语言编写的一个 锁相环的程序。可直接在cpld中应用。

Version 6.0 Build 178 04/27/2006 SJ Full Version
36
1789
OFF
OFF
OFF
OFF
OFF
FV_OFF
Level2
0
0
VRSM_ON
VHSM_ON
0
-- Start Partition --
-- End Partition --
-- Start Library Paths --
-- End Library Paths --
-- Start VHDL Libraries --
-- End VHDL Libraries --
# entity
fq_divider
# storage
db|phase_detector_top.(1).cnf
db|phase_detector_top.(1).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
fq_divider.v
5ff885c487b7de3beeb9d366c31724b
7
# internal_option {
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
COUNTER
625
PARAMETER_DEC
USR
width
10
PARAMETER_DEC
DEF
}
# hierarchies {
fq_divider:fq_divider_10m
}
# end
# entity
fq_divider
# storage
db|phase_detector_top.(2).cnf
db|phase_detector_top.(2).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
fq_divider.v
5ff885c487b7de3beeb9d366c31724b
7
# internal_option {
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
COUNTER
1536
PARAMETER_DEC
USR
width
11
PARAMETER_DEC
DEF
}
# end
# entity
cntr_bmd
# storage
db|phase_detector_top.(4).cnf
db|phase_detector_top.(4).cnf
# case_insensitive
# source_file
db|cntr_bmd.tdf
565855b055b2f476c94d15143d9e06a
6
# used_port {
q9
-1
3
q8
-1
3
q7
-1
3
q6
-1
3
q5
-1
3
q4
-1
3
q3
-1
3
q23
-1
3
q22
-1
3
q21
-1
3
q20
-1
3
q2
-1
3
q19
-1
3
q18
-1
3
q17
-1
3
q16
-1
3
q15
-1
3
q14
-1
3
q13
-1
3
q12
-1
3
q11
-1
3
q10
-1
3
q1
-1
3
q0
-1
3
cnt_en
-1
3
clock
-1
3
aclr
-1
3
}
# end
# entity
phase_detector
# storage
db|phase_detector_top.(5).cnf
db|phase_detector_top.(5).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
phase_detector.v
46868018fd7b45b7999487e383a46ef
7
# internal_option {
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
phase_detector:pha_dec
}
# end
# entity
fq_divider
# storage
db|phase_detector_top.(3).cnf
db|phase_detector_top.(3).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
fq_divider.v
5ff885c487b7de3beeb9d366c31724b
7
# internal_option {
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
COUNTER
1024
PARAMETER_DEC
USR
width
10
PARAMETER_DEC
DEF
}
# hierarchies {
fq_divider:fq_divider_13_75m
}
# end
# entity
fq_divider
# storage
db|phase_detector_top.(6).cnf
db|phase_detector_top.(6).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
fq_divider.v
5ff885c487b7de3beeb9d366c31724b
7
# internal_option {
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
COUNTER
2048
PARAMETER_DEC
USR
width
11
PARAMETER_DEC
DEF
}
# end
# entity
fq_divider
# storage
db|phase_detector_top.(7).cnf
db|phase_detector_top.(7).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
fq_divider.v
5ff885c487b7de3beeb9d366c31724b
7
# internal_option {
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
COUNTER
1000
PARAMETER_DEC
USR
width
10
PARAMETER_DEC
DEF
}
# end
# entity
fq_divider
# storage
db|phase_detector_top.(8).cnf
db|phase_detector_top.(8).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
fq_divider.v
5ff885c487b7de3beeb9d366c31724b
7
# internal_option {
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
COUNTER
6250
PARAMETER_DEC
USR
width
13
PARAMETER_DEC
DEF
}
# end
# entity
fq_divider
# storage
db|phase_detector_top.(9).cnf
db|phase_detector_top.(9).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
fq_divider.v
5ff885c487b7de3beeb9d366c31724b
7
# internal_option {
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
COUNTER
10240
PARAMETER_DEC
USR
width
14
PARAMETER_DEC
DEF
}
# end
# entity
phase_detector_top
# storage
db|phase_detector_top.(0).cnf
db|phase_detector_top.(0).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
phase_detector_top.v
5641b6824b11bfa016d51b98e24c1e1a
7
# internal_option {
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
|
}
# end
# complete