phase_detector_top.map.summary

来自「使用virlog语言编写的一个 锁相环的程序。可直接在cpld中应用。」· SUMMARY 代码 · 共 10 行

Analysis & Synthesis Status : Successful - Mon Jun 18 14:41:57 2007
Quartus II Version : 6.0 Build 178 04/27/2006 SJ Full Version
Revision Name : phase_detector_top
Top-level Entity Name : phase_detector_top
Family : MAX II
Total logic elements : 40
Total pins : 26
Total virtual pins : 0
UFM blocks : 0