eepemu.out

TOSHIBA公司的射频卡VERILOGHDL代码 包括TOP 顶层文件

Statistics for case statements in always block at line 39 in file
        'C:/prj/verilog/try/ticket2/c/t6n76_3/eepemux.v'
===============================================
|           Line           |  full/ parallel  |
===============================================
|            51            |     no/auto      |
===============================================

Inferred THREE-STATE control devices in process 
	in routine EEPEmu line 21 in
         file 'C:/prj/verilog/try/ticket2/c/t6n76_3/eepemux.v'.
============================================================================
|     Three-state Device Name      |               Type               | MB |
============================================================================
|             D_tri<4>             |        Three-state Buffer        | N  |
|             D_tri<0>             |        Three-state Buffer        | N  |
|             D_tri<2>             |        Three-state Buffer        | N  |
|             D_tri<6>             |        Three-state Buffer        | N  |
|             D_tri<7>             |        Three-state Buffer        | N  |
|             D_tri<3>             |        Three-state Buffer        | N  |
|             D_tri<1>             |        Three-state Buffer        | N  |
|             D_tri<5>             |        Three-state Buffer        | N  |
============================================================================


Inferred THREE-STATE control devices in process 
	in routine EEPEmu line 25 in
         file 'C:/prj/verilog/try/ticket2/c/t6n76_3/eepemux.v'.
============================================================================
|     Three-state Device Name      |               Type               | MB |
============================================================================
|          sramDT_tri<1>           |        Three-state Buffer        | N  |
|          sramDT_tri<5>           |        Three-state Buffer        | N  |
|          sramDT_tri<7>           |        Three-state Buffer        | N  |
|          sramDT_tri<3>           |        Three-state Buffer        | N  |
|          sramDT_tri<2>           |        Three-state Buffer        | N  |
|          sramDT_tri<6>           |        Three-state Buffer        | N  |
|          sramDT_tri<4>           |        Three-state Buffer        | N  |
|          sramDT_tri<0>           |        Three-state Buffer        | N  |
============================================================================


Inferred memory devices in process 
	in routine EEPEmu line 35 in file
         'C:/prj/verilog/try/ticket2/c/t6n76_3/eepemux.v'.
===============================================================================
|    Register Name    |   Type    | Width | Bus | MB | AR | AS | SR | SS | ST |
===============================================================================
|      ER12_reg       | Flip-flop |   1   |  -  | -  | N  | N  | N  | N  | N  |
|      WR02_reg       | Flip-flop |   1   |  -  | -  | N  | N  | N  | N  | N  |
===============================================================================

ER12_reg
--------
    set/reset/toggle: none


WR02_reg
--------
    set/reset/toggle: none



Inferred memory devices in process 
	in routine EEPEmu line 39 in file
         'C:/prj/verilog/try/ticket2/c/t6n76_3/eepemux.v'.
===============================================================================
|    Register Name    |   Type    | Width | Bus | MB | AR | AS | SR | SS | ST |
===============================================================================
|       RB_reg        | Flip-flop |   1   |  -  | -  | N  | Y  | N  | N  | N  |
|       cnt_reg       | Flip-flop |  14   |  Y  | N  | N  | N  | N  | N  | N  |
|     sramAD_reg      | Flip-flop |  10   |  N  | N  | ?  | ?  | ?  | ?  | ?  |
|    sramDT2D_reg     | Flip-flop |   1   |  -  | -  | Y  | N  | N  | N  | N  |
|     sramcs_reg      |   Latch   |   1   |  -  | -  | N  | N  | -  | -  | -  |
|     sramoe_reg      | Flip-flop |   1   |  -  | -  | N  | Y  | N  | N  | N  |
|     sramwe_reg      | Flip-flop |   1   |  -  | -  | N  | Y  | N  | N  | N  |
|      stat_reg       | Flip-flop |   4   |  Y  | N  | Y  | N  | N  | N  | N  |
|      wbuf0_reg      | Flip-flop |   8   |  Y  | N  | N  | N  | N  | N  | N  |
|  wbuf02sramDT_reg   | Flip-flop |   1   |  -  | -  | Y  | N  | N  | N  | N  |
|      wbuf_reg       | Flip-flop |  144  |  Y  | N  | N  | N  | N  | N  | N  |
===============================================================================

RB_reg
------
    Async-set: brst'


cnt_reg (width 14)
------------------
    set/reset/toggle: none


sramAD_reg<3>
-------------
    set/reset/toggle: none


sramAD_reg<7>
-------------
    set/reset/toggle: none


sramAD_reg<5>
-------------
    set/reset/toggle: none


sramAD_reg<1>
-------------
    set/reset/toggle: none


sramAD_reg<8>
-------------
    set/reset/toggle: none


sramAD_reg<0>
-------------
    set/reset/toggle: none


sramAD_reg<9>
-------------
    set/reset/toggle: none


sramAD_reg<4>
-------------
    set/reset/toggle: none


sramAD_reg<6>
-------------
    set/reset/toggle: none


sramAD_reg<2>
-------------
    set/reset/toggle: none


sramDT2D_reg
------------
    Async-reset: brst'


sramcs_reg
----------
    reset/set: none


sramoe_reg
----------
    Async-set: brst'


sramwe_reg
----------
    Async-set: brst'


stat_reg (width 4)
------------------
    Async-reset: brst'


wbuf0_reg (width 8)
-------------------
    set/reset/toggle: none


wbuf02sramDT_reg
----------------
    Async-reset: brst'


wbuf_reg (width 144)
--------------------
    set/reset/toggle: none


Warning: Latch inferred in design 'EEPEmu' read with
	'hdlin_check_no_latch'. (HDL-307)
Writing to hnl file 'c:\prj\Verilog\Try\Ticket2\c\T6N76_3\t6n76_3/workdirs/WORK/EEPEmu.hnl'