dct8_medium.vhd

来自「算术处理器的VERILOG hdl的源代码」· VHDL 代码 · 共 2,683 行 · 第 1/5 页

LIBRARY ieee ;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_arith.all;

ENTITY ROM1C IS
   PORT( 
      addr2      : IN     unsigned (1 DOWNTO 0) ;
      compl      : IN     std_ulogic  ;
      enable_rom : IN     std_ulogic  ;
      coeff_out  : OUT    unsigned (11 downto 0)
   );

-- Declarations

END ROM1C ;
--
-- ROM coefficients for calculating X00

ARCHITECTURE behave_rom OF ROM1C IS

type ROM_array is array (7 downto 0) of unsigned(11 downto 0);
signal coeff: ROM_array;
signal addr : integer range 0 to 7;
--signal comptemp : unsigned(1 downto 0);

BEGIN

coeff(0) <= "010110101000";    --     A
coeff(1) <= "011101100100";    --     B
coeff(2) <= "010110101000";    --     A
coeff(3) <= "001100010000";    --     C

-- Complementary values
coeff(4) <= "101001011000";    --     -A
coeff(5) <= "100010011100";    --     -B
coeff(6) <= "101001011000";    --     -A
coeff(7) <= "110011110000";    --     -C


--comptemp <= CONV_UNSIGNED(compl,2);
--addr <= CONV_INTEGER(comptemp&addr2);
addr <= CONV_INTEGER(compl&addr2);

--with enable_rom select
--	coeff_out <= "000000000000" when '0',
--	             coeff(addr) when '1',
--		     "000000000000" when others;
	
coeff_out <= coeff(addr) when enable_rom = '1' else "000000000000";
	

END behave_rom;

--
--
LIBRARY ieee ;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_arith.all;

ENTITY ROMC_01 IS
   PORT( 
      addr2      : IN     unsigned (1 downto 0) ;
      compl      : IN     std_ulogic  ;
      enable_rom : IN     std_ulogic  ;
      coeff_out  : OUT    unsigned (11 DOWNTO 0)
   );

-- Declarations

END ROMC_01 ;
--
--
ARCHITECTURE beh OF ROMC_01 IS

type ROM_array is array (7 downto 0) of unsigned(11 downto 0);
signal coeff: ROM_array;
signal addr : integer range 0 to 7;
--signal comptemp : unsigned(1 downto 0);

signal ap : unsigned(11 downto 0) := "010110101000";
signal bp : unsigned(11 downto 0) := "011101100100";
signal cp : unsigned(11 downto 0) := "001100010000";
signal dp : unsigned(11 downto 0) := "011111011001";
signal ep : unsigned(11 downto 0) := "011010100111";
signal fp : unsigned(11 downto 0) := "010001110010";
signal gp : unsigned(11 downto 0) := "000110010000";

signal am : unsigned(11 downto 0) := "101001011000";
signal bm : unsigned(11 downto 0) := "100010011100";
signal cm : unsigned(11 downto 0) := "110011110000";
signal dm : unsigned(11 downto 0) := "100000100111";
-- signal em : unsigned(11 downto 0) := "100101011001"; -- NOT used
signal fm : unsigned(11 downto 0) := "101110001110";
signal gm : unsigned(11 downto 0) := "111001110000";

BEGIN

coeff(0) <= ap;    --     A
coeff(1) <= cp;    --     C
coeff(2) <= am;    --     -A
coeff(3) <= bm;    --     -B

-- Complementary values
coeff(4) <= am;    --     -A
coeff(5) <= cm;    --     -C
coeff(6) <= ap;    --     A
coeff(7) <= bp;    --     B


--comptemp <= CONV_UNSIGNED(compl,2);
--addr <= CONV_INTEGER(comptemp&addr2);
addr <= CONV_INTEGER(compl&addr2);

--with enable_rom select
--	coeff_out <= "000000000000" when '0',
--	             coeff(addr) when '1',
--		     "000000000000" when others;
	
with enable_rom select
coeff_out <= coeff(addr) when '1',
			     "000000000000" when others;
	

END beh;

--
--
LIBRARY ieee ;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_arith.all;

ENTITY ROMC_02 IS
   PORT( 
      addr2      : IN     unsigned (1 DOWNTO 0) ;
      compl      : IN     std_ulogic  ;
      enable_rom : IN     std_ulogic  ;
      coeff_out  : OUT    unsigned (11 DOWNTO 0)
   );

-- Declarations

END ROMC_02 ;
--
--
ARCHITECTURE beh OF ROMC_02 IS

type ROM_array is array (7 downto 0) of unsigned(11 downto 0);
signal coeff: ROM_array;
signal addr : integer range 0 to 7;
--signal comptemp : unsigned(1 downto 0);

signal ap : unsigned(11 downto 0) := "010110101000";
signal bp : unsigned(11 downto 0) := "011101100100";
signal cp : unsigned(11 downto 0) := "001100010000";
signal dp : unsigned(11 downto 0) := "011111011001";
signal ep : unsigned(11 downto 0) := "011010100111";
signal fp : unsigned(11 downto 0) := "010001110010";
signal gp : unsigned(11 downto 0) := "000110010000";

signal am : unsigned(11 downto 0) := "101001011000";
signal bm : unsigned(11 downto 0) := "100010011100";
signal cm : unsigned(11 downto 0) := "110011110000";
signal dm : unsigned(11 downto 0) := "100000100111";
-- signal em : unsigned(11 downto 0) := "100101011001"; -- NOT used
signal fm : unsigned(11 downto 0) := "101110001110";
signal gm : unsigned(11 downto 0) := "111001110000";

BEGIN

coeff(0) <= ap;    --     A
coeff(1) <= cm;    --     -C
coeff(2) <= am;    --     -A
coeff(3) <= bp;    --     B

-- Complementary values
coeff(4) <= am;    --     -A
coeff(5) <= cp;    --     C
coeff(6) <= ap;    --     A
coeff(7) <= bm;    --     -B


--comptemp <= CONV_UNSIGNED(compl,2);
--addr <= CONV_INTEGER(comptemp&addr2);
addr <= CONV_INTEGER(compl&addr2);

--with enable_rom select
--	coeff_out <= "000000000000" when '0',
--	             coeff(addr) when '1',
--		     "000000000000" when others;
	
with enable_rom select
coeff_out <= coeff(addr) when '1',
			     "000000000000" when others;
	

END beh;

--
--
LIBRARY ieee ;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_arith.all;

ENTITY ROMC_03 IS
   PORT( 
      addr2      : IN     unsigned (1 DOWNTO 0) ;
      compl      : IN     std_ulogic  ;
      enable_rom : IN     std_ulogic  ;
      coeff_out  : OUT    unsigned (11 DOWNTO 0)
   );

-- Declarations

END ROMC_03 ;
--
--
ARCHITECTURE beh OF ROMC_03 IS
type ROM_array is array (7 downto 0) of unsigned(11 downto 0);
signal coeff: ROM_array;
signal addr : integer range 0 to 7;
--signal comptemp : unsigned(1 downto 0);

signal ap : unsigned(11 downto 0) := "010110101000";
signal bp : unsigned(11 downto 0) := "011101100100";
signal cp : unsigned(11 downto 0) := "001100010000";
signal dp : unsigned(11 downto 0) := "011111011001";
signal ep : unsigned(11 downto 0) := "011010100111";
signal fp : unsigned(11 downto 0) := "010001110010";
signal gp : unsigned(11 downto 0) := "000110010000";

signal am : unsigned(11 downto 0) := "101001011000";
signal bm : unsigned(11 downto 0) := "100010011100";
signal cm : unsigned(11 downto 0) := "110011110000";
signal dm : unsigned(11 downto 0) := "100000100111";
-- signal em : unsigned(11 downto 0) := "100101011001"; -- NOT used
signal fm : unsigned(11 downto 0) := "101110001110";
signal gm : unsigned(11 downto 0) := "111001110000";

BEGIN

coeff(0) <= ap;    --     A
coeff(1) <= bm;    --     -B
coeff(2) <= ap;    --     A
coeff(3) <= cm;    --     -C

-- Complementary values
coeff(4) <= am;    --     -A
coeff(5) <= bp;    --     B
coeff(6) <= am;    --     -A
coeff(7) <= cp;    --     C


--comptemp <= CONV_UNSIGNED(compl,2);
--addr <= CONV_INTEGER(comptemp&addr2);
addr <= CONV_INTEGER(compl&addr2);


--with enable_rom select
--	coeff_out <= "000000000000" when '0',
--	             coeff(addr) when '1',
--		     "000000000000" when others;
	
with enable_rom select
coeff_out <= coeff(addr) when '1',
			     "000000000000" when others;
	

END beh;

--
--
LIBRARY ieee ;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_arith.all;

ENTITY ROMC_e0 IS
   PORT( 
      addr2      : IN     unsigned (1 DOWNTO 0) ;
      compl      : IN     std_ulogic  ;
      enable_rom : IN     std_ulogic  ;
      coeff_out  : OUT    unsigned (11 DOWNTO 0)
   );

-- Declarations

END ROMC_e0 ;
--
--
ARCHITECTURE beh OF ROMC_e0 IS
type ROM_array is array (7 downto 0) of unsigned(11 downto 0);
signal coeff: ROM_array;
signal addr : integer range 0 to 7;
--signal comptemp : unsigned(1 downto 0);

signal ap : unsigned(11 downto 0) := "010110101000";
signal bp : unsigned(11 downto 0) := "011101100100";
signal cp : unsigned(11 downto 0) := "001100010000";
signal dp : unsigned(11 downto 0) := "011111011001";
signal ep : unsigned(11 downto 0) := "011010100111";
signal fp : unsigned(11 downto 0) := "010001110010";
signal gp : unsigned(11 downto 0) := "000110010000";

signal am : unsigned(11 downto 0) := "101001011000";
signal bm : unsigned(11 downto 0) := "100010011100";
signal cm : unsigned(11 downto 0) := "110011110000";
signal dm : unsigned(11 downto 0) := "100000100111";
signal em : unsigned(11 downto 0) := "100101011001"; -- NOT used
signal fm : unsigned(11 downto 0) := "101110001110";
signal gm : unsigned(11 downto 0) := "111001110000";

BEGIN

coeff(0) <= dp;    --     D
coeff(1) <= ep;    --     E
coeff(2) <= fp;    --     F
coeff(3) <= gp;    --     G

-- Complementary values
coeff(4) <= dm;    --     -D
coeff(5) <= em;    --     -E
coeff(6) <= fm;    --     -F
coeff(7) <= gm;    --     -G


--comptemp <= CONV_UNSIGNED(compl,2);
--addr <= CONV_INTEGER(comptemp&addr2);
addr <= CONV_INTEGER(compl&addr2);


--with enable_rom select
--	coeff_out <= "000000000000" when '0',
--	             coeff(addr) when '1',
--		     "000000000000" when others;
	
with enable_rom select
coeff_out <= coeff(addr) when '1',
			     "000000000000" when others;
	
END beh;

--
--
LIBRARY ieee ;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_arith.all;

ENTITY ROMC_e1 IS
   PORT( 
      addr2      : IN     unsigned (1 DOWNTO 0) ;
      compl      : IN     std_ulogic  ;
      enable_rom : IN     std_ulogic  ;
      coeff_out  : OUT    unsigned (11 DOWNTO 0)
   );

-- Declarations

END ROMC_e1 ;
--
--
ARCHITECTURE beh OF ROMC_e1 IS
type ROM_array is array (7 downto 0) of unsigned(11 downto 0);
signal coeff: ROM_array;
signal addr : integer range 0 to 7;
--signal comptemp : unsigned(1 downto 0);

signal ap : unsigned(11 downto 0) := "010110101000";
signal bp : unsigned(11 downto 0) := "011101100100";
signal cp : unsigned(11 downto 0) := "001100010000";
signal dp : unsigned(11 downto 0) := "011111011001";
signal ep : unsigned(11 downto 0) := "011010100111";
signal fp : unsigned(11 downto 0) := "010001110010";
signal gp : unsigned(11 downto 0) := "000110010000";

signal am : unsigned(11 downto 0) := "101001011000";
signal bm : unsigned(11 downto 0) := "100010011100";
signal cm : unsigned(11 downto 0) := "110011110000";
signal dm : unsigned(11 downto 0) := "100000100111";
signal em : unsigned(11 downto 0) := "100101011001"; -- NOT used
signal fm : unsigned(11 downto 0) := "101110001110";
signal gm : unsigned(11 downto 0) := "111001110000";

BEGIN

coeff(0) <= ep;    --     E
coeff(1) <= gm;    --     -G
coeff(2) <= dm;    --     -D
coeff(3) <= fm;    --     -F

-- Complementary values
coeff(4) <= em;    --     -E
coeff(5) <= gp;    --     G
coeff(6) <= dp;    --     D
coeff(7) <= fp;    --     F


--comptemp <= CONV_UNSIGNED(compl,2);
--addr <= CONV_INTEGER(comptemp&addr2);
addr <= CONV_INTEGER(compl&addr2);


--with enable_rom select
--	coeff_out <= "000000000000" when '0',
--	             coeff(addr) when '1',
--		     "000000000000" when others;
	
with enable_rom select
coeff_out <= coeff(addr) when '1',
			     "000000000000" when others;
	

END beh;

--
--
LIBRARY ieee ;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_arith.all;

ENTITY ROMC_e2 IS
   PORT( 
      addr2      : IN     unsigned (1 DOWNTO 0) ;
      compl      : IN     std_ulogic  ;
      enable_rom : IN     std_ulogic  ;
      coeff_out  : OUT    unsigned (11 DOWNTO 0)
   );

-- Declarations

END ROMC_e2 ;
--
--
ARCHITECTURE beh OF ROMC_e2 IS
type ROM_array is array (7 downto 0) of unsigned(11 downto 0);
signal coeff: ROM_array;
signal addr : integer range 0 to 7;
--signal comptemp : unsigned(1 downto 0);

signal ap : unsigned(11 downto 0) := "010110101000";
signal bp : unsigned(11 downto 0) := "011101100100";
signal cp : unsigned(11 downto 0) := "001100010000";
signal dp : unsigned(11 downto 0) := "011111011001";
signal ep : unsigned(11 downto 0) := "011010100111";
signal fp : unsigned(11 downto 0) := "010001110010";
signal gp : unsigned(11 downto 0) := "000110010000";

signal am : unsigned(11 downto 0) := "101001011000";
signal bm : unsigned(11 downto 0) := "100010011100";
signal cm : unsigned(11 downto 0) := "110011110000";
signal dm : unsigned(11 downto 0) := "100000100111";
signal em : unsigned(11 downto 0) := "100101011001"; -- NOT used
signal fm : unsigned(11 downto 0) := "101110001110";
signal gm : unsigned(11 downto 0) := "111001110000";

BEGIN

coeff(0) <= fp;    --     F
coeff(1) <= dm;    --     -D
coeff(2) <= gp;    --     G
coeff(3) <= ep;    --     E

-- Complementary values
coeff(4) <= fm;    --     -F
coeff(5) <= dp;    --     D
coeff(6) <= gm;    --     -G
coeff(7) <= em;    --     -E


--comptemp <= CONV_UNSIGNED(compl,2);
--addr <= CONV_INTEGER(comptemp&addr2);
addr <= CONV_INTEGER(compl&addr2);


--with enable_rom select
--	coeff_out <= "000000000000" when '0',
--	             coeff(addr) when '1',
--		     "000000000000" when others;
	
with enable_rom select
coeff_out <= coeff(addr) when '1',
			     "000000000000" when others;
	END beh;

--
--
LIBRARY ieee ;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_arith.all;

ENTITY ROMC_e3 IS
   PORT( 
      addr2      : IN     unsigned (1 DOWNTO 0) ;
      compl      : IN     std_ulogic  ;
      enable_rom : IN     std_ulogic  ;
      coeff_out  : OUT    unsigned (11 DOWNTO 0)
   );

-- Declarations

END ROMC_e3 ;
--
--
ARCHITECTURE beh OF ROMC_e3 IS
type ROM_array is array (7 downto 0) of unsigned(11 downto 0);
signal coeff: ROM_array;
signal addr : integer range 0 to 7;
--signal comptemp : unsigned(1 downto 0);

signal ap : unsigned(11 downto 0) := "010110101000";
signal bp : unsigned(11 downto 0) := "011101100100";
signal cp : unsigned(11 downto 0) := "001100010000";
signal dp : unsigned(11 downto 0) := "011111011001";
signal ep : unsigned(11 downto 0) := "011010100111";
signal fp : unsigned(11 downto 0) := "010001110010";
signal gp : unsigned(11 downto 0) := "000110010000";

signal am : unsigned(11 downto 0) := "101001011000";
signal bm : unsigned(11 downto 0) := "100010011100";
signal cm : unsigned(11 downto 0) := "110011110000";
signal dm : unsigned(11 downto 0) := "100000100111";
signal em : unsigned(11 downto 0) := "100101011001"; -- NOT used
signal fm : unsigned(11 downto 0) := "101110001110";
signal gm : unsigned(11 downto 0) := "111001110000";

BEGIN

coeff(0) <= gp;    --     G
coeff(1) <= fm;    --     -F
coeff(2) <= ep;    --     E
coeff(3) <= dm;    --     -D

-- Complementary values
coeff(4) <= gm;    --     -G
coeff(5) <= fp;    --     F
coeff(6) <= em;    --     -E
coeff(7) <= dp;    --     D