📄 top_sinx.map.qmsg
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{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 5.0 Build 148 04/26/2005 SJ Full Version " "Info: Version 5.0 Build 148 04/26/2005 SJ Full Version" { } { } 0} { "Info" "IQEXE_START_BANNER_TIME" "Fri Apr 14 04:08:56 2006 " "Info: Processing started: Fri Apr 14 04:08:56 2006" { } { } 0} } { } 4}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off top_sinx -c top_sinx " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off top_sinx -c top_sinx" { } { } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "top_sinx.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file top_sinx.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 top_sinx-behav " "Info: Found design unit 1: top_sinx-behav" { } { { "top_sinx.vhd" "" { Text "E:/EDA/DDS/10k844/top/top_sinx.vhd" 10 -1 0 } } } 0} { "Info" "ISGN_ENTITY_NAME" "1 top_sinx " "Info: Found entity 1: top_sinx" { } { { "top_sinx.vhd" "" { Text "E:/EDA/DDS/10k844/top/top_sinx.vhd" 4 -1 0 } } } 0} } { } 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "top_sinx " "Info: Elaborating entity \"top_sinx\" for the top level hierarchy" { } { } 0}
{ "Info" "ISGN_SEARCH_FILE" "INIT_CNT8B.vhd 2 1 " "Info: Using design file INIT_CNT8B.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 INIT_CNT8B-behav " "Info: Found design unit 1: INIT_CNT8B-behav" { } { { "INIT_CNT8B.vhd" "" { Text "E:/EDA/DDS/10k844/top/INIT_CNT8B.vhd" 13 -1 0 } } } 0} { "Info" "ISGN_ENTITY_NAME" "1 INIT_CNT8B " "Info: Found entity 1: INIT_CNT8B" { } { { "INIT_CNT8B.vhd" "" { Text "E:/EDA/DDS/10k844/top/INIT_CNT8B.vhd" 5 -1 0 } } } 0} } { } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "INIT_CNT8B INIT_CNT8B:U1 " "Info: Elaborating entity \"INIT_CNT8B\" for hierarchy \"INIT_CNT8B:U1\"" { } { { "top_sinx.vhd" "U1" { Text "E:/EDA/DDS/10k844/top/top_sinx.vhd" 35 -1 0 } } } 0}
{ "Info" "ISGN_SEARCH_FILE" "SINGT2.vhd 2 1 " "Info: Using design file SINGT2.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 SINGT2-dacc " "Info: Found design unit 1: SINGT2-dacc" { } { { "SINGT2.vhd" "" { Text "E:/EDA/DDS/10k844/top/SINGT2.vhd" 10 -1 0 } } } 0} { "Info" "ISGN_ENTITY_NAME" "1 SINGT2 " "Info: Found entity 1: SINGT2" { } { { "SINGT2.vhd" "" { Text "E:/EDA/DDS/10k844/top/SINGT2.vhd" 5 -1 0 } } } 0} } { } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "SINGT2 SINGT2:U2 " "Info: Elaborating entity \"SINGT2\" for hierarchy \"SINGT2:U2\"" { } { { "top_sinx.vhd" "U2" { Text "E:/EDA/DDS/10k844/top/top_sinx.vhd" 36 -1 0 } } } 0}
{ "Info" "ISGN_SEARCH_FILE" "data_rom_10k.vhd 2 1 " "Info: Using design file data_rom_10k.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 data_rom_10k-SYN " "Info: Found design unit 1: data_rom_10k-SYN" { } { { "data_rom_10k.vhd" "" { Text "E:/EDA/DDS/10k844/top/data_rom_10k.vhd" 49 -1 0 } } } 0} { "Info" "ISGN_ENTITY_NAME" "1 data_rom_10k " "Info: Found entity 1: data_rom_10k" { } { { "data_rom_10k.vhd" "" { Text "E:/EDA/DDS/10k844/top/data_rom_10k.vhd" 39 -1 0 } } } 0} } { } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "data_rom_10k SINGT2:U2\|data_rom_10k:u1 " "Info: Elaborating entity \"data_rom_10k\" for hierarchy \"SINGT2:U2\|data_rom_10k:u1\"" { } { { "SINGT2.vhd" "u1" { Text "E:/EDA/DDS/10k844/top/SINGT2.vhd" 25 -1 0 } } } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "d:/altera/quartus50/libraries/megafunctions/lpm_rom.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file d:/altera/quartus50/libraries/megafunctions/lpm_rom.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_rom " "Info: Found entity 1: lpm_rom" { } { { "lpm_rom.tdf" "" { Text "d:/altera/quartus50/libraries/megafunctions/lpm_rom.tdf" 40 1 0 } } } 0} } { } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "lpm_rom SINGT2:U2\|data_rom_10k:u1\|lpm_rom:lpm_rom_component " "Info: Elaborating entity \"lpm_rom\" for hierarchy \"SINGT2:U2\|data_rom_10k:u1\|lpm_rom:lpm_rom_component\"" { } { { "data_rom_10k.vhd" "lpm_rom_component" { Text "E:/EDA/DDS/10k844/top/data_rom_10k.vhd" 75 -1 0 } } } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "d:/altera/quartus50/libraries/megafunctions/altrom.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file d:/altera/quartus50/libraries/megafunctions/altrom.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altrom " "Info: Found entity 1: altrom" { } { { "altrom.tdf" "" { Text "d:/altera/quartus50/libraries/megafunctions/altrom.tdf" 75 1 0 } } } 0} } { } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altrom SINGT2:U2\|data_rom_10k:u1\|lpm_rom:lpm_rom_component\|altrom:srom " "Info: Elaborating entity \"altrom\" for hierarchy \"SINGT2:U2\|data_rom_10k:u1\|lpm_rom:lpm_rom_component\|altrom:srom\"" { } { { "lpm_rom.tdf" "srom" { Text "d:/altera/quartus50/libraries/megafunctions/lpm_rom.tdf" 51 3 0 } } } 0}
{ "Warning" "WCDB_CDB_FILE_NOT_FOUND" "E:/EDA/DDS/10k844/top/romd_10K.mif " "Warning: Can't find Memory Initialization File or Hexadecimal (Intel-Format) File E:/EDA/DDS/10k844/top/romd_10K.mif -- setting all initial values to 0" { } { } 0}
{ "Info" "IOPT_INFERENCING_SUMMARY" "2 " "Info: Inferred 2 megafunctions from design logic" { { "Info" "IOPT_LPM_COUNTER_INFERRED" "INIT_CNT8B:U1\|CNT8\[0\]~8 8 " "Info: Inferred lpm_counter megafunction (LPM_WIDTH=8) from the following logic: \"INIT_CNT8B:U1\|CNT8\[0\]~8\"" { } { { "INIT_CNT8B.vhd" "CNT8\[0\]~8" { Text "E:/EDA/DDS/10k844/top/INIT_CNT8B.vhd" 17 -1 0 } } } 0} { "Info" "IOPT_LPM_COUNTER_INFERRED" "SINGT2:U2\|Q\[0\]~0 7 " "Info: Inferred lpm_counter megafunction (LPM_WIDTH=7) from the following logic: \"SINGT2:U2\|Q\[0\]~0\"" { } { { "SINGT2.vhd" "Q\[0\]~0" { Text "E:/EDA/DDS/10k844/top/SINGT2.vhd" 18 -1 0 } } } 0} } { } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "d:/altera/quartus50/libraries/megafunctions/lpm_counter.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file d:/altera/quartus50/libraries/megafunctions/lpm_counter.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_counter " "Info: Found entity 1: lpm_counter" { } { { "lpm_counter.tdf" "" { Text "d:/altera/quartus50/libraries/megafunctions/lpm_counter.tdf" 227 1 0 } } } 0} } { } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "d:/altera/quartus50/libraries/megafunctions/alt_counter_f10ke.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file d:/altera/quartus50/libraries/megafunctions/alt_counter_f10ke.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 alt_counter_f10ke " "Info: Found entity 1: alt_counter_f10ke" { } { { "alt_counter_f10ke.tdf" "" { Text "d:/altera/quartus50/libraries/megafunctions/alt_counter_f10ke.tdf" 250 1 0 } } } 0} } { } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "d:/altera/quartus50/libraries/megafunctions/lpm_add_sub.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file d:/altera/quartus50/libraries/megafunctions/lpm_add_sub.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_add_sub " "Info: Found entity 1: lpm_add_sub" { } { { "lpm_add_sub.tdf" "" { Text "d:/altera/quartus50/libraries/megafunctions/lpm_add_sub.tdf" 100 1 0 } } } 0} } { } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "d:/altera/quartus50/libraries/megafunctions/addcore.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file d:/altera/quartus50/libraries/megafunctions/addcore.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 addcore " "Info: Found entity 1: addcore" { } { { "addcore.tdf" "" { Text "d:/altera/quartus50/libraries/megafunctions/addcore.tdf" 73 1 0 } } } 0} } { } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "d:/altera/quartus50/libraries/megafunctions/a_csnbuffer.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file d:/altera/quartus50/libraries/megafunctions/a_csnbuffer.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 a_csnbuffer " "Info: Found entity 1: a_csnbuffer" { } { { "a_csnbuffer.tdf" "" { Text "d:/altera/quartus50/libraries/megafunctions/a_csnbuffer.tdf" 10 1 0 } } } 0} } { } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "d:/altera/quartus50/libraries/megafunctions/altshift.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file d:/altera/quartus50/libraries/megafunctions/altshift.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altshift " "Info: Found entity 1: altshift" { } { { "altshift.tdf" "" { Text "d:/altera/quartus50/libraries/megafunctions/altshift.tdf" 28 1 0 } } } 0} } { } 0}
{ "Warning" "WOPT_OPT_REMOVED_ALWAYS_ENABLED_TRI" "SINGT2:U2\|data_rom_10k:u1\|lpm_rom:lpm_rom_component\|otri\[0\] " "Warning: Removed always-enabled tri-state buffer SINGT2:U2\|data_rom_10k:u1\|lpm_rom:lpm_rom_component\|otri\[0\] feeding logic, open-drain buffer or output pin" { } { } 0}
{ "Warning" "WOPT_OPT_REMOVED_ALWAYS_ENABLED_TRI" "SINGT2:U2\|data_rom_10k:u1\|lpm_rom:lpm_rom_component\|otri\[1\] " "Warning: Removed always-enabled tri-state buffer SINGT2:U2\|data_rom_10k:u1\|lpm_rom:lpm_rom_component\|otri\[1\] feeding logic, open-drain buffer or output pin" { } { } 0}
{ "Warning" "WOPT_OPT_REMOVED_ALWAYS_ENABLED_TRI" "SINGT2:U2\|data_rom_10k:u1\|lpm_rom:lpm_rom_component\|otri\[2\] " "Warning: Removed always-enabled tri-state buffer SINGT2:U2\|data_rom_10k:u1\|lpm_rom:lpm_rom_component\|otri\[2\] feeding logic, open-drain buffer or output pin" { } { } 0}
{ "Warning" "WOPT_OPT_REMOVED_ALWAYS_ENABLED_TRI" "SINGT2:U2\|data_rom_10k:u1\|lpm_rom:lpm_rom_component\|otri\[3\] " "Warning: Removed always-enabled tri-state buffer SINGT2:U2\|data_rom_10k:u1\|lpm_rom:lpm_rom_component\|otri\[3\] feeding logic, open-drain buffer or output pin" { } { } 0}
{ "Warning" "WOPT_OPT_REMOVED_ALWAYS_ENABLED_TRI" "SINGT2:U2\|data_rom_10k:u1\|lpm_rom:lpm_rom_component\|otri\[4\] " "Warning: Removed always-enabled tri-state buffer SINGT2:U2\|data_rom_10k:u1\|lpm_rom:lpm_rom_component\|otri\[4\] feeding logic, open-drain buffer or output pin" { } { } 0}
{ "Warning" "WOPT_OPT_REMOVED_ALWAYS_ENABLED_TRI" "SINGT2:U2\|data_rom_10k:u1\|lpm_rom:lpm_rom_component\|otri\[5\] " "Warning: Removed always-enabled tri-state buffer SINGT2:U2\|data_rom_10k:u1\|lpm_rom:lpm_rom_component\|otri\[5\] feeding logic, open-drain buffer or output pin" { } { } 0}
{ "Warning" "WOPT_OPT_REMOVED_ALWAYS_ENABLED_TRI" "SINGT2:U2\|data_rom_10k:u1\|lpm_rom:lpm_rom_component\|otri\[6\] " "Warning: Removed always-enabled tri-state buffer SINGT2:U2\|data_rom_10k:u1\|lpm_rom:lpm_rom_component\|otri\[6\] feeding logic, open-drain buffer or output pin" { } { } 0}
{ "Warning" "WOPT_OPT_REMOVED_ALWAYS_ENABLED_TRI" "SINGT2:U2\|data_rom_10k:u1\|lpm_rom:lpm_rom_component\|otri\[7\] " "Warning: Removed always-enabled tri-state buffer SINGT2:U2\|data_rom_10k:u1\|lpm_rom:lpm_rom_component\|otri\[7\] feeding logic, open-drain buffer or output pin" { } { } 0}
{ "Info" "ISCL_SCL_TM_SUMMARY" "51 " "Info: Implemented 51 device resources after synthesis - the final resource count might be different" { { "Info" "ISCL_SCL_TM_IPINS" "9 " "Info: Implemented 9 input pins" { } { } 0} { "Info" "ISCL_SCL_TM_OPINS" "8 " "Info: Implemented 8 output pins" { } { } 0} { "Info" "ISCL_SCL_TM_LCELLS" "26 " "Info: Implemented 26 logic cells" { } { } 0} { "Info" "ISCL_SCL_TM_RAMS" "8 " "Info: Implemented 8 RAM segments" { } { } 0} } { } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 9 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 9 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Fri Apr 14 04:09:02 2006 " "Info: Processing ended: Fri Apr 14 04:09:02 2006" { } { } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:07 " "Info: Elapsed time: 00:00:07" { } { } 0} } { } 0}
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