digclk.ucf

来自「数字钟的实现」· UCF 代码 · 共 27 行

#PACE: Start of Constraints generated by PACE

#PACE: Start of PACE I/O Pin Assignments
NET "clk"  LOC = "p76"  ; 
NET "clr"  LOC = "p182"  ;
NET "lcd_data<0>"  LOC = "p102"  ; 
NET "lcd_data<1>"  LOC = "p106"  ; 
NET "lcd_data<2>"  LOC = "p107"  ; 
NET "lcd_data<3>"  LOC = "p108"  ; 
NET "lcd_data<4>"  LOC = "p109"  ; 
NET "lcd_data<5>"  LOC = "p111"  ; 
NET "lcd_data<6>"  LOC = "p113"  ; 
NET "lcd_data<7>"  LOC = "p114"  ; 
NET "lcd_en"  LOC = "p116"  ; 
NET "lcd_rs"  LOC = "p117"  ; 
NET "lcd_rw"  LOC = "p115"  ; 
NET "rst"  LOC = "p79"  ; 
NET "shour"  LOC = "p180"  ; 
NET "smin"  LOC = "p181"  ; 
NET "sound"  LOC = "p119"  ; 

#PACE: Start of PACE Area Constraints

#PACE: Start of PACE Prohibit Constraints

#PACE: End of Constraints generated by PACE