antishake.fit

这是用VHDL语言编写的一个DDS频率合成器的源程序

-- MAX+plus II Compiler Fit File      
-- Version 10.2 07/10/2002            
-- Compiled: 05/04/2004 09:42:01      

-- Copyright (C) 1988-2002 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera.  Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner.  Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors.  No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.

CHIP "antishake"
BEGIN

    DEVICE = "EPF10K10LC84-3";

    "clk"                          : INPUT_PIN  = 1      ;
    "sin0"                         : INPUT_PIN  = 2      ;
    "sin1"                         : INPUT_PIN  = 42     ;
    "sin2"                         : INPUT_PIN  = 44     ;
    "sin3"                         : INPUT_PIN  = 84     ;
    "sout0"                        : OUTPUT_PIN = 17     ;
    "sout1"                        : OUTPUT_PIN = 60     ;
    "sout2"                        : OUTPUT_PIN = 22     ;
    "sout3"                        : OUTPUT_PIN = 27     ;
    ":10"                          : LOCATION   = LC2_C11;  -- s13
    ":11"                          : LOCATION   = LC1_B5 ;  -- s12
    ":12"                          : LOCATION   = LC1_C20;  -- s11
    ":13"                          : LOCATION   = LC1_A8 ;  -- s10
    ":14"                          : LOCATION   = LC3_C11;  -- s23
    ":15"                          : LOCATION   = LC3_B5 ;  -- s22
    ":16"                          : LOCATION   = LC2_C20;  -- s21
    ":17"                          : LOCATION   = LC3_A8 ;  -- s20
    ":120"                         : LOCATION   = LC1_C11;
    ":121"                         : LOCATION   = LC2_B5 ;
    ":122"                         : LOCATION   = LC4_C20;
    ":123"                         : LOCATION   = LC2_A8 ;

END;

INTERNAL_INFO "antishake"
BEGIN
	DEVICE = EPF10K10LC84-3;
    OD4P1   : LORAX = "1:FB4->LC2_C11,->LC1_B5,->LC1_C20,->LC1_A8,->LC3_C11,->LC3_B5,->LC2_C20,->LC3_A8|";
    OD1P2   : LORAX = "1:FB1|2:FH1R0,PA20R0C7->LC1_A8||";
    OD3P42  : LORAX = "1:FB3|2:FH3R2,PA5R2C19->LC1_C20||";
    OD2P44  : LORAX = "1:FB2|2:FH2R1,PA6R1C4->LC1_B5||";
    OD0P84  : LORAX = "1:FB0|2:FH0R2,PA0R2C10->LC2_C11||";
    LC1_C11 : LORAX = "1:MSW0R2C10,HHL18R2->OH8R2P27|";
    LC2_B5  : LORAX = "1:MSW1R1C4,G22R1->OH9R1P22|";
    LC4_C20 : LORAX = "1:MSW3R2C19,HHR13R2->OH3R2P60|";
    LC2_A8  : LORAX = "1:MSW2R0C6,HHL3R0->OH10R0P17|";
	LC2_C11 : LORAX2 = "OD0P84, X, X, X";
	LC1_B5  : LORAX2 = "OD2P44, X, X, X";
	LC1_C20 : LORAX2 = "OD3P42, X, X, X";
	LC1_A8  : LORAX2 = "OD1P2, X, X, X";
	LC3_C11 : LORAX2 = "X, X, X, LC2_C11";
	LC3_B5  : LORAX2 = "X, X, X, LC1_B5";
	LC2_C20 : LORAX2 = "X, X, X, LC1_C20";
	LC3_A8  : LORAX2 = "X, X, X, LC1_A8";
	LC1_C11 : LORAX2 = "X, X, LC3_C11, LC2_C11";
	LC2_B5  : LORAX2 = "X, X, LC3_B5, LC1_B5";
	LC4_C20 : LORAX2 = "X, X, LC2_C20, LC1_C20";
	LC2_A8  : LORAX2 = "X, X, LC3_A8, LC1_A8";
END;