testint.fit

这是用VHDL语言编写的一个DDS频率合成器的源程序

-- MAX+plus II Compiler Fit File      
-- Version 10.2 07/10/2002            
-- Compiled: 05/08/2004 18:25:48      

-- Copyright (C) 1988-2002 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera.  Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner.  Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors.  No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.

CHIP "testint"
BEGIN

    DEVICE = "EPF10K10LC84-4";

    "clk"                          : INPUT_PIN  = 19     ;
    "int"                          : OUTPUT_PIN = 17     ;
    "|FREQDIV:3|LPM_ADD_SUB:179|addcore:adder|:103" : LOCATION   = LC1_A19;
    "|FREQDIV:3|LPM_ADD_SUB:179|addcore:adder|:107" : LOCATION   = LC3_A19;
    "|FREQDIV:3|LPM_ADD_SUB:179|addcore:adder|:115" : LOCATION   = LC2_A19;
    "|FREQDIV:3|LPM_ADD_SUB:179|addcore:adder|:119" : LOCATION   = LC3_A14;
    "|FREQDIV:3|LPM_ADD_SUB:179|addcore:adder|:127" : LOCATION   = LC4_A14;
    "|FREQDIV:3|LPM_ADD_SUB:179|addcore:adder|:131" : LOCATION   = LC2_A14;
    "|FREQDIV:3|LPM_ADD_SUB:179|addcore:adder|:139" : LOCATION   = LC1_A23;
    "|FREQDIV:3|LPM_ADD_SUB:179|addcore:adder|:143" : LOCATION   = LC2_A23;
    "|FREQDIV:3|:2"                : LOCATION   = LC3_A23;
    "|FREQDIV:3|:4"                : LOCATION   = LC8_A23;  -- |FREQDIV:3|num14
    "|FREQDIV:3|:5"                : LOCATION   = LC7_A23;  -- |FREQDIV:3|num13
    "|FREQDIV:3|:6"                : LOCATION   = LC5_A23;  -- |FREQDIV:3|num12
    "|FREQDIV:3|:7"                : LOCATION   = LC4_A23;  -- |FREQDIV:3|num11
    "|FREQDIV:3|:8"                : LOCATION   = LC1_A14;  -- |FREQDIV:3|num10
    "|FREQDIV:3|:9"                : LOCATION   = LC8_A14;  -- |FREQDIV:3|num9
    "|FREQDIV:3|:10"               : LOCATION   = LC6_A14;  -- |FREQDIV:3|num8
    "|FREQDIV:3|:11"               : LOCATION   = LC7_A14;  -- |FREQDIV:3|num7
    "|FREQDIV:3|:12"               : LOCATION   = LC5_A14;  -- |FREQDIV:3|num6
    "|FREQDIV:3|:13"               : LOCATION   = LC7_A19;  -- |FREQDIV:3|num5
    "|FREQDIV:3|:14"               : LOCATION   = LC8_A19;  -- |FREQDIV:3|num4
    "|FREQDIV:3|:15"               : LOCATION   = LC2_A17;  -- |FREQDIV:3|num3
    "|FREQDIV:3|:16"               : LOCATION   = LC4_A19;  -- |FREQDIV:3|num2
    "|FREQDIV:3|:17"               : LOCATION   = LC6_A19;  -- |FREQDIV:3|num1
    "|FREQDIV:3|:18"               : LOCATION   = LC5_A19;  -- |FREQDIV:3|num0
    "|FREQDIV:3|:80"               : LOCATION   = LC6_A23;

END;

INTERNAL_INFO "testint"
BEGIN
	DEVICE = EPF10K10LC84-4;
    OH14R0P19 : LORAX = "1:|2:G56R0|3:PA4R0C13->LC1_A14,->LC8_A14,->LC6_A14,->LC7_A14,->LC5_A14|,3:PA12R0C18->LC7_A19,->LC8_A19,->LC4_A19,->LC6_A19,->LC5_A19||,2:G44R0|3:PA6R0C16->LC2_A17|,3:PA6R0C22->LC3_A23,->LC8_A23,->LC7_A23,->LC5_A23,->LC4_A23|||";
    LC1_A19 : LORAX = "1:MSW0R0C18,HHR22R0,PA2R0C16->LC2_A17|";
    LC2_A19 : LORAX = "1:MSW1R0C18,HHR8R0,PA14R0C13->LC3_A14,->LC5_A14|";
    LC2_A14 : LORAX = "1:MSW1R0C13,HHR11R0,PA4R0C22->LC1_A23,->LC4_A23|";
    LC3_A23 : LORAX = "1:MSW2R0C22,G10R0->OH10R0P17|";
    LC1_A14 : LORAX = "1:MSW0R0C13,HHR23R0,PA1R0C22->LC1_A23,->LC4_A23|";
    LC2_A17 : LORAX = "1:MSW1R0C16,HHR5R0,PA17R0C18->LC3_A19|";
    LC6_A23 : LORAX = "1:|2:MSW5R0C22,HHR42R0,PA7R0C13->LC1_A14,->LC8_A14,->LC6_A14,->LC7_A14,->LC5_A14|,2:MSW5R0C23,HHR39R0|3:PA10R0C16->LC2_A17|,3:PA10R0C18->LC7_A19,->LC8_A19,->LC4_A19,->LC6_A19|||";
	LC1_A19 : LORAX2 = "X, LC4_A19, LC6_A19, LC5_A19";
	LC3_A19 : LORAX2 = "X, X, LC2_A17, LC1_A19";
	LC2_A19 : LORAX2 = "X, LC7_A19, LC8_A19, LC3_A19";
	LC3_A14 : LORAX2 = "X, X, LC5_A14, LC2_A19";
	LC4_A14 : LORAX2 = "X, LC6_A14, LC7_A14, LC3_A14";
	LC2_A14 : LORAX2 = "X, X, LC8_A14, LC4_A14";
	LC1_A23 : LORAX2 = "X, LC4_A23, LC1_A14, LC2_A14";
	LC2_A23 : LORAX2 = "X, X, LC5_A23, LC1_A23";
	LC3_A23 : LORAX2 = "LC8_A23, LC7_A23, LC3_A23, LC2_A23";
	LC8_A23 : LORAX2 = "X, LC8_A23, LC7_A23, LC2_A23";
	LC7_A23 : LORAX2 = "X, X, LC7_A23, LC2_A23";
	LC5_A23 : LORAX2 = "X, LC5_A23, LC6_A23, LC1_A23";
	LC4_A23 : LORAX2 = "LC4_A23, LC1_A14, LC6_A23, LC2_A14";
	LC1_A14 : LORAX2 = "X, LC1_A14, LC6_A23, LC2_A14";
	LC8_A14 : LORAX2 = "X, LC8_A14, LC6_A23, LC4_A14";
	LC6_A14 : LORAX2 = "LC6_A14, LC7_A14, LC6_A23, LC3_A14";
	LC7_A14 : LORAX2 = "X, LC7_A14, LC6_A23, LC3_A14";
	LC5_A14 : LORAX2 = "X, LC5_A14, LC6_A23, LC2_A19";
	LC7_A19 : LORAX2 = "LC7_A19, LC8_A19, LC6_A23, LC3_A19";
	LC8_A19 : LORAX2 = "X, LC8_A19, LC6_A23, LC3_A19";
	LC2_A17 : LORAX2 = "X, LC2_A17, LC6_A23, LC1_A19";
	LC4_A19 : LORAX2 = "LC4_A19, LC6_A19, LC6_A23, LC5_A19";
	LC6_A19 : LORAX2 = "X, LC6_A19, LC5_A19, LC6_A23";
	LC5_A19 : LORAX2 = "X, X, X, LC5_A19";
	LC6_A23 : LORAX2 = "X, LC8_A23, LC7_A23, LC2_A23";
END;