📄 dds.rpt
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02: 1/24( 4%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
03: 2/24( 8%) 0/4( 0%) 2/4( 50%) 0/4( 0%)
04: 1/24( 4%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
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08: 4/24( 16%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
09: 3/24( 12%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
10: 2/24( 8%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
11: 4/24( 16%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
12: 5/24( 20%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
13: 2/24( 8%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
14: 4/24( 16%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
15: 3/24( 12%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
16: 2/24( 8%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
17: 1/24( 4%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
18: 1/24( 4%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
19: 2/24( 8%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
20: 1/24( 4%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
21: 2/24( 8%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
22: 2/24( 8%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
23: 1/24( 4%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
24: 3/24( 12%) 0/4( 0%) 2/4( 50%) 0/4( 0%)
EA: 4/24( 16%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
Device-Specific Information:e:\documents\maple8282\my documents\study\dds\maple8282\dds.rpt
dds
** CLOCK SIGNALS **
Type Fan-out Name
INPUT 75 clk
DFF 31 |FREQDIV:2|:2
Device-Specific Information:e:\documents\maple8282\my documents\study\dds\maple8282\dds.rpt
dds
** EQUATIONS **
clk : INPUT;
key0 : INPUT;
key1 : INPUT;
key2 : INPUT;
key3 : INPUT;
-- Node name is 'co0'
-- Equation name is 'co0', type is output
co0 = _LC1_A12;
-- Node name is 'co1'
-- Equation name is 'co1', type is output
co1 = _LC8_B23;
-- Node name is 'co2'
-- Equation name is 'co2', type is output
co2 = _LC7_B23;
-- Node name is 'co3'
-- Equation name is 'co3', type is output
co3 = _LC6_B23;
-- Node name is 'co4'
-- Equation name is 'co4', type is output
co4 = _LC1_B22;
-- Node name is 'co5'
-- Equation name is 'co5', type is output
co5 = _LC1_B13;
-- Node name is 'co6'
-- Equation name is 'co6', type is output
co6 = _LC4_A12;
-- Node name is 'co7'
-- Equation name is 'co7', type is output
co7 = _LC1_A5;
-- Node name is 'cs1'
-- Equation name is 'cs1', type is output
cs1 = VCC;
-- Node name is 'cs2'
-- Equation name is 'cs2', type is output
cs2 = VCC;
-- Node name is 'cs3'
-- Equation name is 'cs3', type is output
cs3 = GND;
-- Node name is 'cs4~1'
-- Equation name is 'cs4~1', location is LC8_A5, type is buried.
-- synthesized logic cell
_LC8_A5 = LCELL( clk);
-- Node name is 'cs4'
-- Equation name is 'cs4', type is output
cs4 = !_LC8_A5;
-- Node name is 'data0'
-- Equation name is 'data0', type is output
data0 = _LC7_A22;
-- Node name is 'data1'
-- Equation name is 'data1', type is output
data1 = _LC1_A22;
-- Node name is 'data2'
-- Equation name is 'data2', type is output
data2 = _LC7_A20;
-- Node name is 'data3'
-- Equation name is 'data3', type is output
data3 = _LC1_A20;
-- Node name is 'data4'
-- Equation name is 'data4', type is output
data4 = _LC4_A18;
-- Node name is 'data5'
-- Equation name is 'data5', type is output
data5 = _LC3_A18;
-- Node name is 'data6'
-- Equation name is 'data6', type is output
data6 = _LC4_A16;
-- Node name is 'data7'
-- Equation name is 'data7', type is output
data7 = _LC6_A16;
-- Node name is 'int'
-- Equation name is 'int', type is output
int = !_LC2_A12;
-- Node name is 'kin0'
-- Equation name is 'kin0', type is output
kin0 = !_LC1_A1;
-- Node name is 'kin1'
-- Equation name is 'kin1', type is output
kin1 = !_LC7_B4;
-- Node name is 'kin2'
-- Equation name is 'kin2', type is output
kin2 = !_LC2_B4;
-- Node name is 'kin3'
-- Equation name is 'kin3', type is output
kin3 = !_LC8_B7;
-- Node name is 'ko0'
-- Equation name is 'ko0', type is output
ko0 = _LC6_B10;
-- Node name is 'ko1'
-- Equation name is 'ko1', type is output
ko1 = _LC6_B7;
-- Node name is 'ko2'
-- Equation name is 'ko2', type is output
ko2 = _LC4_B7;
-- Node name is 'ko3'
-- Equation name is 'ko3', type is output
ko3 = _LC2_B7;
-- Node name is 'kv'
-- Equation name is 'kv', type is output
kv = _LC6_B5;
-- Node name is 'so0'
-- Equation name is 'so0', type is output
so0 = _LC6_A1;
-- Node name is 'so1'
-- Equation name is 'so1', type is output
so1 = _LC1_B4;
-- Node name is 'so2'
-- Equation name is 'so2', type is output
so2 = _LC5_B4;
-- Node name is 'so3'
-- Equation name is 'so3', type is output
so3 = _LC1_B7;
-- Node name is '|ANTISHAKE:36|:13' = '|ANTISHAKE:36|s10'
-- Equation name is '_LC3_A1', type is buried
_LC3_A1 = DFFE(!key0, clk, VCC, VCC, VCC);
-- Node name is '|ANTISHAKE:36|:12' = '|ANTISHAKE:36|s11'
-- Equation name is '_LC3_B4', type is buried
_LC3_B4 = DFFE(!key1, clk, VCC, VCC, VCC);
-- Node name is '|ANTISHAKE:36|:11' = '|ANTISHAKE:36|s12'
-- Equation name is '_LC6_B4', type is buried
_LC6_B4 = DFFE(!key2, clk, VCC, VCC, VCC);
-- Node name is '|ANTISHAKE:36|:10' = '|ANTISHAKE:36|s13'
-- Equation name is '_LC7_B7', type is buried
_LC7_B7 = DFFE(!key3, clk, VCC, VCC, VCC);
-- Node name is '|ANTISHAKE:36|:17' = '|ANTISHAKE:36|s20'
-- Equation name is '_LC4_A1', type is buried
_LC4_A1 = DFFE( _LC3_A1, clk, VCC, VCC, VCC);
-- Node name is '|ANTISHAKE:36|:16' = '|ANTISHAKE:36|s21'
-- Equation name is '_LC4_B4', type is buried
_LC4_B4 = DFFE( _LC3_B4, clk, VCC, VCC, VCC);
-- Node name is '|ANTISHAKE:36|:15' = '|ANTISHAKE:36|s22'
-- Equation name is '_LC8_B4', type is buried
_LC8_B4 = DFFE( _LC6_B4, clk, VCC, VCC, VCC);
-- Node name is '|ANTISHAKE:36|:14' = '|ANTISHAKE:36|s23'
-- Equation name is '_LC5_B7', type is buried
_LC5_B7 = DFFE( _LC7_B7, clk, VCC, VCC, VCC);
-- Node name is '|ANTISHAKE:36|~120~1'
-- Equation name is '_LC8_B7', type is buried
-- synthesized logic cell
_LC8_B7 = LCELL( _EQ001);
_EQ001 = !_LC5_B7 & _LC7_B7;
-- Node name is '|ANTISHAKE:36|:120'
-- Equation name is '_LC1_B7', type is buried
_LC1_B7 = LCELL( _EQ002);
_EQ002 = !_LC5_B7 & _LC7_B7;
-- Node name is '|ANTISHAKE:36|~121~1'
-- Equation name is '_LC2_B4', type is buried
-- synthesized logic cell
!_LC2_B4 = _LC2_B4~NOT;
_LC2_B4~NOT = LCELL( _EQ003);
_EQ003 = !_LC6_B4
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