📄 dds.rpt
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Project Informatione:\documents\maple8282\my documents\study\dds\maple8282\dds.rpt
MAX+plus II Compiler Report File
Version 10.2 07/10/2002
Compiled: 05/05/2004 09:55:16
Copyright (C) 1988-2002 Altera Corporation
Any megafunction design, and related net list (encrypted or decrypted),
support information, device programming or simulation file, and any other
associated documentation or information provided by Altera or a partner
under Altera's Megafunction Partnership Program may be used only to
program PLD devices (but not masked PLD devices) from Altera. Any other
use of such megafunction design, net list, support information, device
programming or simulation file, or any other related documentation or
information is prohibited for any other purpose, including, but not
limited to modification, reverse engineering, de-compiling, or use with
any other silicon devices, unless such use is explicitly licensed under
a separate agreement with Altera or a megafunction partner. Title to
the intellectual property, including patents, copyrights, trademarks,
trade secrets, or maskworks, embodied in any such megafunction design,
net list, support information, device programming or simulation file, or
any other related documentation or information provided by Altera or a
megafunction partner, remains with Altera, the megafunction partner, or
their respective licensors. No other licenses, including any licenses
needed under any third party's intellectual property, are provided herein.
***** Project compilation was successful
** DEVICE SUMMARY **
Chip/ Input Output Bidir Memory Memory LCs
POF Device Pins Pins Pins Bits % Utilized LCs % Utilized
dds EPF10K10LC84-4 5 34 0 4096 66 % 246 42 %
User Pins: 5 34 0
Project Informatione:\documents\maple8282\my documents\study\dds\maple8282\dds.rpt
** PIN/LOCATION/CHIP ASSIGNMENTS **
Actual
User Assignments
Assignments (if different) Node Name
dds@19 clk
dds@73 co0
dds@78 co1
dds@79 co2
dds@80 co3
dds@81 co4
dds@83 co5
dds@3 co6
dds@5 co7
dds@18 cs1
dds@70 cs2
dds@25 cs3
dds@69 cs4
dds@58 data0
dds@54 data1
dds@53 data2
dds@52 data3
dds@51 data4
dds@50 data5
dds@49 data6
dds@48 data7
dds@17 int
dds@67 key0
dds@66 key1
dds@65 key2
dds@64 key3
Project Informatione:\documents\maple8282\my documents\study\dds\maple8282\dds.rpt
** EMBEDDED ARRAYS **
|LPM_ROM:15|altrom:srom|content: MEMORY (
width = 8;
depth = 512;
segmentsize = 512;
mode = MEM_READONLY#MEM_INITIALIZED;
file = "e:\documents\maple8282\my documents\study\dds\maple8282\temp.mif";
)
OF SEGMENTS (
|LPM_ROM:15|altrom:srom|segment0_7,
|LPM_ROM:15|altrom:srom|segment0_6,
|LPM_ROM:15|altrom:srom|segment0_5,
|LPM_ROM:15|altrom:srom|segment0_4,
|LPM_ROM:15|altrom:srom|segment0_3,
|LPM_ROM:15|altrom:srom|segment0_2,
|LPM_ROM:15|altrom:srom|segment0_1,
|LPM_ROM:15|altrom:srom|segment0_0
);
Project Informatione:\documents\maple8282\my documents\study\dds\maple8282\dds.rpt
** FILE HIERARCHY **
|control1:1|
|control1:1|lpm_add_sub:466|
|control1:1|lpm_add_sub:466|addcore:adder|
|control1:1|lpm_add_sub:466|altshift:result_ext_latency_ffs|
|control1:1|lpm_add_sub:466|altshift:carry_ext_latency_ffs|
|control1:1|lpm_add_sub:466|altshift:oflow_ext_latency_ffs|
|control1:1|lpm_add_sub:485|
|control1:1|lpm_add_sub:485|addcore:adder|
|control1:1|lpm_add_sub:485|altshift:result_ext_latency_ffs|
|control1:1|lpm_add_sub:485|altshift:carry_ext_latency_ffs|
|control1:1|lpm_add_sub:485|altshift:oflow_ext_latency_ffs|
|control1:1|lpm_add_sub:1125|
|control1:1|lpm_add_sub:1125|addcore:adder|
|control1:1|lpm_add_sub:1125|altshift:result_ext_latency_ffs|
|control1:1|lpm_add_sub:1125|altshift:carry_ext_latency_ffs|
|control1:1|lpm_add_sub:1125|altshift:oflow_ext_latency_ffs|
|control1:1|lpm_add_sub:1144|
|control1:1|lpm_add_sub:1144|addcore:adder|
|control1:1|lpm_add_sub:1144|altshift:result_ext_latency_ffs|
|control1:1|lpm_add_sub:1144|altshift:carry_ext_latency_ffs|
|control1:1|lpm_add_sub:1144|altshift:oflow_ext_latency_ffs|
|freqdiv:2|
|freqdiv:2|lpm_add_sub:100|
|freqdiv:2|lpm_add_sub:100|addcore:adder|
|freqdiv:2|lpm_add_sub:100|altshift:result_ext_latency_ffs|
|freqdiv:2|lpm_add_sub:100|altshift:carry_ext_latency_ffs|
|freqdiv:2|lpm_add_sub:100|altshift:oflow_ext_latency_ffs|
|filter:6|
|filter:6|lpm_add_sub:70|
|filter:6|lpm_add_sub:70|addcore:adder|
|filter:6|lpm_add_sub:70|altshift:result_ext_latency_ffs|
|filter:6|lpm_add_sub:70|altshift:carry_ext_latency_ffs|
|filter:6|lpm_add_sub:70|altshift:oflow_ext_latency_ffs|
|filter:6|lpm_add_sub:111|
|filter:6|lpm_add_sub:111|addcore:adder|
|filter:6|lpm_add_sub:111|altshift:result_ext_latency_ffs|
|filter:6|lpm_add_sub:111|altshift:carry_ext_latency_ffs|
|filter:6|lpm_add_sub:111|altshift:oflow_ext_latency_ffs|
|lpm_rom:15|
|lpm_rom:15|altrom:srom|
|phase_adder:17|
|phase_adder:17|lpm_add_sub:228|
|phase_adder:17|lpm_add_sub:228|addcore:adder|
|phase_adder:17|lpm_add_sub:228|altshift:result_ext_latency_ffs|
|phase_adder:17|lpm_add_sub:228|altshift:carry_ext_latency_ffs|
|phase_adder:17|lpm_add_sub:228|altshift:oflow_ext_latency_ffs|
|phase_reg:18|
|key_decoder:35|
|antishake:36|
Device-Specific Information:e:\documents\maple8282\my documents\study\dds\maple8282\dds.rpt
dds
***** Logic for device 'dds' compiled without errors.
Device: EPF10K10LC84-4
FLEX 10K Configuration Scheme: Passive Serial
Device Options:
User-Supplied Start-Up Clock = OFF
Auto-Restart Configuration on Frame Error = OFF
Release Clears Before Tri-States = OFF
Enable Chip_Wide Reset = OFF
Enable Chip-Wide Output Enable = OFF
Enable INIT_DONE Output = OFF
JTAG User Code = 7f
^
C
R R O
E E N
S S V G G G G F
E E C N N N N _ ^
R R k k C D D D D # D n
V V s i i s c I c I I I c I c c c c T O C
E E o n n o o N o N N N o N o o o o C N E
D D 0 2 1 2 7 T 6 T T T 5 T 4 3 2 1 K E O
-----------------------------------------------------------------_
/ 11 10 9 8 7 6 5 4 3 2 1 84 83 82 81 80 79 78 77 76 75 |
^DATA0 | 12 74 | #TDO
^DCLK | 13 73 | co0
^nCE | 14 72 | RESERVED
#TDI | 15 71 | RESERVED
kin0 | 16 70 | cs2
int | 17 69 | cs4
cs1 | 18 68 | GNDINT
clk | 19 67 | key0
VCCINT | 20 66 | key1
so1 | 21 65 | key2
ko3 | 22 EPF10K10LC84-4 64 | key3
ko2 | 23 63 | VCCINT
ko1 | 24 62 | RESERVED
cs3 | 25 61 | RESERVED
GNDINT | 26 60 | RESERVED
so3 | 27 59 | RESERVED
RESERVED | 28 58 | data0
RESERVED | 29 57 | #TMS
RESERVED | 30 56 | #TRST
^MSEL0 | 31 55 | ^nSTATUS
^MSEL1 | 32 54 | data1
|_ 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 _|
------------------------------------------------------------------
V ^ k k k R R V G G G G V G R d d d d d d
C n v i o E E C N N N N C N E a a a a a a
C C n 0 S S C D D D D C D S t t t t t t
I O 3 E E I I I I I I I E a a a a a a
N N R R N N N N N N N R 7 6 5 4 3 2
T F V V T T T T T T T V
I E E E
G D D D
N.C. = No Connect. This pin has no internal connection to the device.
VCCINT = Dedicated power pin, which MUST be connected to VCC (5.0 volts).
VCCIO = Dedicated power pin, which MUST be connected to VCC (5.0 volts).
GNDINT = Dedicated ground pin or unused dedicated input, which MUST be connected to GND.
GNDIO = Dedicated ground pin, which MUST be connected to GND.
RESERVED = Unused I/O pin, which MUST be left unconnected.
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