delay.fit

这是用VHDL语言编写的一个DDS频率合成器的源程序

-- MAX+plus II Compiler Fit File      
-- Version 10.2 07/10/2002            
-- Compiled: 05/05/2004 10:47:13      

-- Copyright (C) 1988-2002 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera.  Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner.  Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors.  No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.

CHIP "delay"
BEGIN

    DEVICE = "EPF10K10LC84-3";

    "clk"                          : INPUT_PIN  = 1      ;
    "sin"                          : INPUT_PIN  = 2      ;
    "sout"                         : OUTPUT_PIN = 25     ;
    "|LPM_ADD_SUB:83|addcore:adder|:55" : LOCATION   = LC1_B5 ;
    ":3"                           : LOCATION   = LC8_B10;
    ":5"                           : LOCATION   = LC6_B10;  -- s13
    ":6"                           : LOCATION   = LC7_B10;  -- s12
    ":7"                           : LOCATION   = LC3_B10;  -- s11
    ":8"                           : LOCATION   = LC4_B10;  -- s10
    "~45~1"                        : LOCATION   = LC2_B10;
    ":68"                          : LOCATION   = LC1_B10;
    "~119~1"                       : LOCATION   = LC5_B10;

END;

INTERNAL_INFO "delay"
BEGIN
	DEVICE = EPF10K10LC84-3;
    OD4P1   : LORAX = "1:FB4->LC8_B10,->LC6_B10,->LC7_B10,->LC3_B10,->LC4_B10|";
    LC1_B5  : LORAX = "1:MSW0R1C4,HHL18R1,PA11R1C9->LC6_B10|";
    OD1P2   : LORAX = "1:FB1|2:FH1R1,PA20R1C9->LC2_B10||";
    LC8_B10 : LORAX = "1:MSW7R1C9,HHL27R1->OH15R1P25|";
    LC3_B10 : LORAX = "1:MSW2R1C9,HHL14R1,PA1R1C4->LC1_B5|";
    LC4_B10 : LORAX = "1:MSW3R1C9,HHL17R1,PA19R1C4->LC1_B5|";
	LC1_B5  : LORAX2 = "X, X, LC4_B10, LC3_B10";
	LC8_B10 : LORAX2 = "X, LC4_B10, LC2_B10, LC1_B10";
	LC6_B10 : LORAX2 = "LC1_B5, LC6_B10, LC5_B10, LC7_B10";
	LC7_B10 : LORAX2 = "LC4_B10, LC7_B10, LC5_B10, LC3_B10";
	LC3_B10 : LORAX2 = "LC4_B10, LC2_B10, LC3_B10, LC1_B10";
	LC4_B10 : LORAX2 = "X, LC4_B10, LC2_B10, LC1_B10";
	LC2_B10 : LORAX2 = "OD1P2, LC6_B10, LC3_B10, LC7_B10";
	LC1_B10 : LORAX2 = "LC8_B10, LC6_B10, LC7_B10, LC3_B10";
	LC5_B10 : LORAX2 = "X, LC4_B10, LC2_B10, LC1_B10";
END;