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来自「实现USB接口功能的VHDL和verilog完整源代码」· 代码 · 共 7 行

This directory includes ....

	1. smarti.v : usb to smartmedia card interface .
	2. smarti_box.v : smart box for fpga synthesis .
	3. smarti_params.v : parameters.
	4. tri_bus.v : bidirectional io bus .