userialeng.v

实现USB接口功能的VHDL和verilog完整源代码

module Userialeng
	(
	// inputs from bus
                testmode,
                testreset,
		clock48,	// 48 MHz clock
		rcvin,		// differential in
		vpin,		// plus in
		vmin,		// minus in
		usbclock,	// clock in, which is wrapped from usbclockout at top level

	// inputs from device
		xmitlastbyte,
		xmitdatatogglebit,
		xmitdatabyte,
		senddata,
		sendnak,
		sendack,
		sendstall,

	// outputs
		vmo,		// minus out
		vpo,		// plus out
		usboen,	// oe for usb bits

	// outputs to device
		usbclockout,	// 12 MHz clock
	        pwronreset,
		usbreset,	// usb reset signal
		turnaround,	// turnaround timer expired
		rcvdatabyte,
		rcvdatabytevalid,
		rcvaddress,
		rcvaddressvalid,
		rcvendpoint,
		rcvendpointvalid,
		startofframe,
		framenumber,
		rcvdatatogglebit,
		rcvack,
		rcvdata,
		rcvdatain,
		rcvdataout,
		rcvsetup,
		rcvpacketok,
		rcvpacketnotok,
		nextxmitbyte,
		acksent,
		datasent,
		naksent,
		syncreset,
		stallsent,
	        suspend,
		resumen,
		cpusignalresume
	);

  input        testmode;
  input        testreset;
  input	       clock48;
  input	       rcvin;
  input	       vpin;
  input	       vmin;
  input	       usbclock;
  //input	       usbclocksuspended;

  input	       xmitlastbyte;
  input	       xmitdatatogglebit;
  input [7:0]  xmitdatabyte;
  input	       senddata;
  input	       sendnak;
  input	       sendack;
  input	       sendstall;

  output       vmo;
  output       vpo;
  output       usboen;
  output       usbclockout;
  //output       usbclocksuspendedout;
  //output       clock24out;
  input	       pwronreset;
  output       usbreset;
  output       turnaround;
  output [7:0] rcvdatabyte;
  output       rcvdatabytevalid;
  output [6:0] rcvaddress;
  output       rcvaddressvalid;
  output [3:0] rcvendpoint;
  output       rcvendpointvalid;
  output       startofframe;
  output [10:0] framenumber;
  output        syncreset;
  output       rcvdatatogglebit;
  output       rcvack;
  output       rcvdata;
  output       rcvdatain;
  output       rcvdataout;
  output       rcvsetup;
  output       rcvpacketok;
  output       rcvpacketnotok;
  output       nextxmitbyte;
  output       acksent;
  output       datasent;
  output       naksent;
  output       stallsent;
  output       suspend;
  input        resumen;
  input		cpusignalresume;

wire	rcvsyncidle;
wire	rcvsyncrcv;
wire	rcvsyncse0;
wire	rcvsyncerror;
wire	syncreset;
wire	syncreset48;
wire	usbreset;

wire	se0reset;
wire	[6:0]	rcvaddress;
wire	rcvaddressvalid;
wire	[3:0]	rcvendpoint;
wire	rcvendpointvalid;
wire	[7:0]	rcvdatabyte;
wire	rcvdatabytevalid;

wire	xmitcrcout;
wire	rcvdatavalid;
wire	rcvdatabit;
wire	rcvcrc5data;
wire	rcvcrc5check;
wire	rcvcrc16data;
wire	rcvcrc16check;
wire	xmitdatavalid;
wire	xmitdatabit;
wire	xmitcrc16data;
wire	xmitcrc16send;
wire	crcerrordetected;
wire	xmitidle;
wire	oktoxmit;

Usiedpll dpll	(
	// inputs
        .testmode(testmode),
        .testreset(testreset),
	.clock48 (clock48),
	.usbclock (usbclock),
	.rcvin (rcvin),
	.vpin (vpin),
	.vmin (vmin),
	.pwronreset (pwronreset),
	.se0reset (se0reset),
	.syncreset48 (syncreset48),
	//.suspend (suspend),
	.xmitactive (xmitactive),
	.usboen (usboen),

	// outputs
	.syncidle (rcvsyncidle),
	.syncrcv (rcvsyncrcv),
	.syncse0 (rcvsyncse0),
	.syncerror (rcvsyncerror),
	.syncreset (syncreset),
	.usbreset (usbreset),
	.syncreset48out (syncreset48),
	.usbclockout (usbclockout)//,
	//.usbclocksuspendedout (usbclocksuspendedout),
	//.clock24out (clock24out)
	);

Usienrzi nrzi	(
	//inputs
	.usbclock (usbclock),
	.syncreset (syncreset),
	.syncidle (rcvsyncidle),
	.syncrcv (rcvsyncrcv),
	.syncse0 (rcvsyncse0),
	.syncerror (rcvsyncerror),
	.xmitactive (xmitactive),

	// outputs
	.datavalid (rcvdatavalid),
	.databit (rcvdatabit),
	.dataerror (rcvdataerror),
	.dataidle (rcvdataidle),
	.datase0 (rcvdatase0)
	);

Usiecntr cntr	(
	//inputs
        .testmode(testmode),
        .testreset(testreset),
	.usbclock (usbclock),
	.syncreset (syncreset),
	.syncidle (rcvsyncidle),
	.syncse0 (rcvsyncse0),
	.xmitactive (xmitactive),
	.vpin (vpin),
	.resumen (resumen),

	//outputs
	.turnaround (turnaround),
	.se0reset (se0reset),
	.suspend (suspend),
	.oktoxmit (oktoxmit)
	);

Usiedcd	dcd	(
	//inputs
	.usbclock (usbclock),
	.usbreset (usbreset),
	.datavalid (rcvdatavalid),
	.databit (rcvdatabit),
	.dataerror (rcvdataerror),
	.dataidle (rcvdataidle),
	.datase0 (rcvdatase0),
	.crcerrordetected (crcerrordetected),

	// outputs to device
	.address (rcvaddress),
	.addressvalid (rcvaddressvalid),
	.endpoint (rcvendpoint),
	.endpointvalid (rcvendpointvalid),
	.databyte (rcvdatabyte),
	.databytevalid (rcvdatabytevalid),
	.startofframe (startofframe),
	.framenumber (framenumber),
	.rcvdatatogglebit (rcvdatatogglebit),
	.rcvack (rcvack),
	.rcvdata (rcvdata),
	.rcvdatain (rcvdatain),
	.rcvdataout (rcvdataout),
	.rcvsetup (rcvsetup),
	.rcvpacketnotok (rcvpacketnotok),

	// outputs to sie internals
	.rcvcrc5data (rcvcrc5data),
	.rcvcrc5check (rcvcrc5check),
	.rcvcrc16data (rcvcrc16data),
	.rcvcrc16check (rcvcrc16check)
	);

Usiecrc	crc	(
	//inputs
	.usbclock (usbclock),
	.usbreset (usbreset),
	.rcvdatavalid (rcvdatavalid),
	.rcvdatabit (rcvdatabit),
	.rcvcrc5data (rcvcrc5data),
	.rcvcrc5check (rcvcrc5check),
	.rcvcrc16data (rcvcrc16data),
	.rcvcrc16check (rcvcrc16check),
	.xmitdatavalid (xmitdatavalid),
	.xmitdatabit (xmitdatabit),
	.xmitcrc16data (xmitcrc16data),
	.xmitcrc16send (xmitcrc16send),
	.xmitactive (xmitactive),

	//outputs
	.xmitcrcout (xmitcrcout),
	.crcerrordetected (crcerrordetected),
	.crccheckok (rcvpacketok)
	);

Usienrzo nrzo (
	// inputs
        .testmode(testmode),
        .testreset(testreset),
	.usbclock (usbclock),
	.syncreset (syncreset),
        .usbreset (usbreset),
	.xmitactive (xmitactive),
	.xmitidle (xmitidle),
	.xmitdata (xmitdatabit),
	.xmitse0 (xmitsendse0),
  	.cpusignalresume (cpusignalresume),

	// outputs
	.nextxmitdata (nextxmitdata),
	.vpo (vpo),
	.vmo (vmo),
	.usboen (usboen)
	
	);

Usiepkt	pkt	(
        // inputs from bus/dpll/nrzo/crc
        .testmode(testmode),
        .testreset(testreset),
	.usbclock (usbclock),
	.syncreset (syncreset),
	.usbreset (usbreset),
	.nextxmitdata (nextxmitdata),
	.oktoxmit (oktoxmit),
	.xmitcrcout (xmitcrcout),

	// inputs from device/function 
	.xmitlastbyte (xmitlastbyte),
	.xmitdatatogglebit (xmitdatatogglebit),
	.xmitdatabyte (xmitdatabyte),
	.senddata (senddata),
	.sendnak (sendnak),
	.sendack (sendack),
	.sendstall (sendstall),

	// outputs to bus
	.xmitactive (xmitactive),
	.xmitidle (xmitidle),
	.xmitdatabit (xmitdatabit),
	.xmitsendse0 (xmitsendse0),
	.xmitcrc16data (xmitcrc16data),
	.xmitcrc16send (xmitcrc16send),
	.xmitdatavalid (xmitdatavalid),

	// outputs to device/function
	.nextxmitbyte (nextxmitbyte),
	.datasent (datasent),
	.stallsent (stallsent),
	.acksent (acksent),
	.naksent (naksent)
	);

endmodule