testbench6.fdo

来自「自己在ISE下用VHDL写的UART」· FDO 代码 · 共 17 行

## NOTE:  Do not edit this file.
## Autogenerated by ProjNav (creatfdo.tcl) on Mon Apr 17 09:01:27 中国标准时间 2006
##
vlib work
vcom -93 -explicit  E:/sk/iseobject/ex/sk/receive.vhd
vcom -93 -explicit  E:/sk/iseobject/ex/sk/send.vhd
vcom -93 -explicit  E:/sk/iseobject/ex/sk/ctrl.vhd
vcom -93 -explicit  new_top.vhf
vcom -93 -explicit  E:/sk/iseobject/ex/sk/new_tb.vhd
vsim -t 1ps   -lib work testbench6
do testbench6.udo
view wave
add wave *
view structure
view signals
run 1000ns