fujieqiall.map.summary

来自「用FPGA实现数字复接?肍PGA实现数字复接」· SUMMARY 代码 · 共 9 行

Analysis & Synthesis Status : Successful - Mon May 22 23:10:19 2006
Quartus II Version : 5.1 Build 216 03/06/2006 SP 2 SJ Web Edition
Revision Name : fujieqiall
Top-level Entity Name : fujieqiall
Family : FLEX10K
Total logic elements : 34
Total pins : 39
Total memory bits : 0