agc.sta.qmsg

AGC verilog实现

{ "Info" "ITAPI_TAPI_STARTED" "" "Info: Started post-fitting delay annotation" {  } {  } 0 0 "Started post-fitting delay annotation" 0 0 "" 0 -1}
{ "Info" "ITAPI_TAPI_COMPLETED" "" "Info: Delay annotation completed successfully" {  } {  } 0 0 "Delay annotation completed successfully" 0 0 "" 0 -1}
{ "Info" "ISTA_UNKNOWN_UNATE_EDGE_ASSUMED_POS" "" "Info: The following timing edges are non-unate.  TimeQuest will assume pos-unate behavior for these edges in the clock network." { { "Info" "ISTA_CLOCK_MGR_INFO" "From: Add0~10\|cin  to: Add0~10\|dataf " "Info: From: Add0~10\|cin  to: Add0~10\|dataf" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CLOCK_MGR_INFO" "From: Add0~10\|datac  to: Add0~10\|dataf " "Info: From: Add0~10\|datac  to: Add0~10\|dataf" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CLOCK_MGR_INFO" "From: Add0~14\|cin  to: Add0~14\|datad " "Info: From: Add0~14\|cin  to: Add0~14\|datad" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CLOCK_MGR_INFO" "From: Add0~14\|datac  to: Add0~14\|datad " "Info: From: Add0~14\|datac  to: Add0~14\|datad" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CLOCK_MGR_INFO" "From: Add0~18\|cin  to: cnt\[5\]~6\|combout " "Info: From: Add0~18\|cin  to: cnt\[5\]~6\|combout" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CLOCK_MGR_INFO" "From: Add0~2\|datad  to: Add0~2\|dataf " "Info: From: Add0~2\|datad  to: Add0~2\|dataf" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CLOCK_MGR_INFO" "From: Add0~6\|cin  to: Add0~6\|datad " "Info: From: Add0~6\|cin  to: Add0~6\|datad" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CLOCK_MGR_INFO" "From: Add0~6\|datac  to: Add0~6\|datad " "Info: From: Add0~6\|datac  to: Add0~6\|datad" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}  } {  } 0 0 "The following timing edges are non-unate.  TimeQuest will assume pos-unate behavior for these edges in the clock network." 0 0 "" 0 -1}
{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty " "Info: Deriving Clock Uncertainty" { { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -rise_from \[get_clocks \{rst\}\] -rise_to \[get_clocks \{rst\}\] -setup 0.020 " "Info: set_clock_uncertainty -rise_from \[get_clocks \{rst\}\] -rise_to \[get_clocks \{rst\}\] -setup 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -rise_from \[get_clocks \{rst\}\] -fall_to \[get_clocks \{rst\}\] -setup 0.020 " "Info: set_clock_uncertainty -rise_from \[get_clocks \{rst\}\] -fall_to \[get_clocks \{rst\}\] -setup 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -fall_from \[get_clocks \{rst\}\] -rise_to \[get_clocks \{rst\}\] -setup 0.020 " "Info: set_clock_uncertainty -fall_from \[get_clocks \{rst\}\] -rise_to \[get_clocks \{rst\}\] -setup 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -fall_from \[get_clocks \{rst\}\] -fall_to \[get_clocks \{rst\}\] -setup 0.020 " "Info: set_clock_uncertainty -fall_from \[get_clocks \{rst\}\] -fall_to \[get_clocks \{rst\}\] -setup 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -rise_from \[get_clocks \{rst\}\] -rise_to \[get_clocks \{rst\}\] -hold 0.020 " "Info: set_clock_uncertainty -rise_from \[get_clocks \{rst\}\] -rise_to \[get_clocks \{rst\}\] -hold 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -rise_from \[get_clocks \{rst\}\] -fall_to \[get_clocks \{rst\}\] -hold 0.020 " "Info: set_clock_uncertainty -rise_from \[get_clocks \{rst\}\] -fall_to \[get_clocks \{rst\}\] -hold 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -fall_from \[get_clocks \{rst\}\] -rise_to \[get_clocks \{rst\}\] -hold 0.020 " "Info: set_clock_uncertainty -fall_from \[get_clocks \{rst\}\] -rise_to \[get_clocks \{rst\}\] -hold 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -fall_from \[get_clocks \{rst\}\] -fall_to \[get_clocks \{rst\}\] -hold 0.020 " "Info: set_clock_uncertainty -fall_from \[get_clocks \{rst\}\] -fall_to \[get_clocks \{rst\}\] -hold 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}
{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Critical Warning: Timing requirements not met" {  } {  } 1 0 "Timing requirements not met" 0 0 "" 0 -1}
{ "Info" "ISTA_WORST_CASE_SLACK" "setup -4.490 " "Info: Worst-case setup slack is -4.490" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack End Point TNS Clock  " "Info:     Slack End Point TNS Clock " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "Info: ========= ============= =====================" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   -4.490      -165.912 rst  " "Info:    -4.490      -165.912 rst " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}  } {  } 0 0 "Worst-case %1!s! slack is %2!s!" 0 0 "" 0 -1}
{ "Info" "ISTA_WORST_CASE_SLACK" "hold -3.931 " "Info: Worst-case hold slack is -3.931" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack End Point TNS Clock  " "Info:     Slack End Point TNS Clock " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "Info: ========= ============= =====================" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   -3.931      -135.692 rst  " "Info:    -3.931      -135.692 rst " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}  } {  } 0 0 "Worst-case %1!s! slack is %2!s!" 0 0 "" 0 -1}
{ "Info" "ISTA_WORST_CASE_SLACK" "recovery -0.972 " "Info: Worst-case recovery slack is -0.972" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack End Point TNS Clock  " "Info:     Slack End Point TNS Clock " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "Info: ========= ============= =====================" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   -0.972       -31.318 rst  " "Info:    -0.972       -31.318 rst " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}  } {  } 0 0 "Worst-case %1!s! slack is %2!s!" 0 0 "" 0 -1}
{ "Info" "ISTA_WORST_CASE_SLACK" "removal -3.357 " "Info: Worst-case removal slack is -3.357" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack End Point TNS Clock  " "Info:     Slack End Point TNS Clock " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "Info: ========= ============= =====================" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   -3.357      -117.050 rst  " "Info:    -3.357      -117.050 rst " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}  } {  } 0 0 "Worst-case %1!s! slack is %2!s!" 0 0 "" 0 -1}
{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -3.016 " "Info: Worst-case minimum pulse width slack is -3.016" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack End Point TNS Clock  " "Info:     Slack End Point TNS Clock " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "Info: ========= ============= =====================" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   -3.016      -950.738 rst  " "Info:    -3.016      -950.738 rst " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}  } {  } 0 0 "Worst-case %1!s! slack is %2!s!" 0 0 "" 0 -1}
{ "Info" "0" "" "Info: Analyzing Fast 1100mV 0C Model" {  } {  } 0 0 "Analyzing Fast 1100mV 0C Model" 0 0 "" 0 -1}
{ "Info" "ITAPI_TAPI_STARTED" "" "Info: Started post-fitting delay annotation" {  } {  } 0 0 "Started post-fitting delay annotation" 0 0 "" 0 -1}
{ "Info" "ITAPI_TAPI_COMPLETED" "" "Info: Delay annotation completed successfully" {  } {  } 0 0 "Delay annotation completed successfully" 0 0 "" 0 -1}
{ "Info" "ISTA_UNKNOWN_UNATE_EDGE_ASSUMED_POS" "" "Info: The following timing edges are non-unate.  TimeQuest will assume pos-unate behavior for these edges in the clock network." { { "Info" "ISTA_CLOCK_MGR_INFO" "From: Add0~10\|cin  to: Add0~10\|dataf " "Info: From: Add0~10\|cin  to: Add0~10\|dataf" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CLOCK_MGR_INFO" "From: Add0~10\|datac  to: Add0~10\|dataf " "Info: From: Add0~10\|datac  to: Add0~10\|dataf" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CLOCK_MGR_INFO" "From: Add0~14\|cin  to: Add0~14\|datad " "Info: From: Add0~14\|cin  to: Add0~14\|datad" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CLOCK_MGR_INFO" "From: Add0~14\|datac  to: Add0~14\|datad " "Info: From: Add0~14\|datac  to: Add0~14\|datad" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CLOCK_MGR_INFO" "From: Add0~18\|cin  to: cnt\[5\]~6\|combout " "Info: From: Add0~18\|cin  to: cnt\[5\]~6\|combout" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CLOCK_MGR_INFO" "From: Add0~2\|datad  to: Add0~2\|dataf " "Info: From: Add0~2\|datad  to: Add0~2\|dataf" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CLOCK_MGR_INFO" "From: Add0~6\|cin  to: Add0~6\|datad " "Info: From: Add0~6\|cin  to: Add0~6\|datad" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CLOCK_MGR_INFO" "From: Add0~6\|datac  to: Add0~6\|datad " "Info: From: Add0~6\|datac  to: Add0~6\|datad" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}  } {  } 0 0 "The following timing edges are non-unate.  TimeQuest will assume pos-unate behavior for these edges in the clock network." 0 0 "" 0 -1}