agc.sta.qmsg

AGC verilog实现

{ "Warning" "WSTA_SCC_LOOP" "2 " "Warning: Found combinational loop of 2 nodes" { { "Warning" "WSTA_SCC_NODE" "Add0~6\|datad " "Warning: Node \"Add0~6\|datad\"" {  } {  } 0 0 "Node \"%1!s!\"" 0 0 "" 0 -1} { "Warning" "WSTA_SCC_NODE" "Add0~6\|sumout " "Warning: Node \"Add0~6\|sumout\"" {  } {  } 0 0 "Node \"%1!s!\"" 0 0 "" 0 -1}  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 19 -1 0 } }  } 0 0 "Found combinational loop of %1!d! nodes" 0 0 "" 0 -1}
{ "Warning" "WSTA_SCC_LOOP" "2 " "Warning: Found combinational loop of 2 nodes" { { "Warning" "WSTA_SCC_NODE" "Add0~2\|dataf " "Warning: Node \"Add0~2\|dataf\"" {  } {  } 0 0 "Node \"%1!s!\"" 0 0 "" 0 -1} { "Warning" "WSTA_SCC_NODE" "Add0~2\|sumout " "Warning: Node \"Add0~2\|sumout\"" {  } {  } 0 0 "Node \"%1!s!\"" 0 0 "" 0 -1}  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 19 -1 0 } }  } 0 0 "Found combinational loop of %1!d! nodes" 0 0 "" 0 -1}
{ "Warning" "WSTA_SCC_LOOP" "2 " "Warning: Found combinational loop of 2 nodes" { { "Warning" "WSTA_SCC_NODE" "cnt\[0\]~5\|combout " "Warning: Node \"cnt\[0\]~5\|combout\"" {  } {  } 0 0 "Node \"%1!s!\"" 0 0 "" 0 -1} { "Warning" "WSTA_SCC_NODE" "cnt\[0\]~5\|datac " "Warning: Node \"cnt\[0\]~5\|datac\"" {  } {  } 0 0 "Node \"%1!s!\"" 0 0 "" 0 -1}  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 9 -1 0 } }  } 0 0 "Found combinational loop of %1!d! nodes" 0 0 "" 0 -1}
{ "Info" "ISTA_UNKNOWN_UNATE_EDGE_ASSUMED_POS" "" "Info: The following timing edges are non-unate.  TimeQuest will assume pos-unate behavior for these edges in the clock network." { { "Info" "ISTA_CLOCK_MGR_INFO" "From: Add0~10\|cin  to: Add0~10\|dataf " "Info: From: Add0~10\|cin  to: Add0~10\|dataf" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CLOCK_MGR_INFO" "From: Add0~10\|datac  to: Add0~10\|dataf " "Info: From: Add0~10\|datac  to: Add0~10\|dataf" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CLOCK_MGR_INFO" "From: Add0~14\|cin  to: Add0~14\|datad " "Info: From: Add0~14\|cin  to: Add0~14\|datad" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CLOCK_MGR_INFO" "From: Add0~14\|datac  to: Add0~14\|datad " "Info: From: Add0~14\|datac  to: Add0~14\|datad" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CLOCK_MGR_INFO" "From: Add0~18\|cin  to: cnt\[5\]~6\|combout " "Info: From: Add0~18\|cin  to: cnt\[5\]~6\|combout" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CLOCK_MGR_INFO" "From: Add0~2\|datad  to: Add0~2\|dataf " "Info: From: Add0~2\|datad  to: Add0~2\|dataf" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CLOCK_MGR_INFO" "From: Add0~6\|cin  to: Add0~6\|datad " "Info: From: Add0~6\|cin  to: Add0~6\|datad" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CLOCK_MGR_INFO" "From: Add0~6\|datac  to: Add0~6\|datad " "Info: From: Add0~6\|datac  to: Add0~6\|datad" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}  } {  } 0 0 "The following timing edges are non-unate.  TimeQuest will assume pos-unate behavior for these edges in the clock network." 0 0 "" 0 -1}
{ "Info" "ISTA_NO_CLOCK_UNCERTAINTY_FOUND_DERIVING" "\"derive_clock_uncertainty\" " "Info: No user constrained clock uncertainty found in the design. Calling \"derive_clock_uncertainty\"" {  } {  } 0 0 "No user constrained clock uncertainty found in the design. Calling %1!s!" 0 0 "" 0 -1}
{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty " "Info: Deriving Clock Uncertainty" { { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -rise_from \[get_clocks \{rst\}\] -rise_to \[get_clocks \{rst\}\] -setup 0.020 " "Info: set_clock_uncertainty -rise_from \[get_clocks \{rst\}\] -rise_to \[get_clocks \{rst\}\] -setup 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -rise_from \[get_clocks \{rst\}\] -fall_to \[get_clocks \{rst\}\] -setup 0.020 " "Info: set_clock_uncertainty -rise_from \[get_clocks \{rst\}\] -fall_to \[get_clocks \{rst\}\] -setup 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -fall_from \[get_clocks \{rst\}\] -rise_to \[get_clocks \{rst\}\] -setup 0.020 " "Info: set_clock_uncertainty -fall_from \[get_clocks \{rst\}\] -rise_to \[get_clocks \{rst\}\] -setup 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -fall_from \[get_clocks \{rst\}\] -fall_to \[get_clocks \{rst\}\] -setup 0.020 " "Info: set_clock_uncertainty -fall_from \[get_clocks \{rst\}\] -fall_to \[get_clocks \{rst\}\] -setup 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -rise_from \[get_clocks \{rst\}\] -rise_to \[get_clocks \{rst\}\] -hold 0.020 " "Info: set_clock_uncertainty -rise_from \[get_clocks \{rst\}\] -rise_to \[get_clocks \{rst\}\] -hold 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -rise_from \[get_clocks \{rst\}\] -fall_to \[get_clocks \{rst\}\] -hold 0.020 " "Info: set_clock_uncertainty -rise_from \[get_clocks \{rst\}\] -fall_to \[get_clocks \{rst\}\] -hold 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -fall_from \[get_clocks \{rst\}\] -rise_to \[get_clocks \{rst\}\] -hold 0.020 " "Info: set_clock_uncertainty -fall_from \[get_clocks \{rst\}\] -rise_to \[get_clocks \{rst\}\] -hold 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -fall_from \[get_clocks \{rst\}\] -fall_to \[get_clocks \{rst\}\] -hold 0.020 " "Info: set_clock_uncertainty -fall_from \[get_clocks \{rst\}\] -fall_to \[get_clocks \{rst\}\] -hold 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}
{ "Info" "0" "" "Info: Analyzing Slow 1100mV 85C Model" {  } {  } 0 0 "Analyzing Slow 1100mV 85C Model" 0 0 "" 0 -1}
{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Critical Warning: Timing requirements not met" {  } {  } 1 0 "Timing requirements not met" 0 0 "" 0 -1}
{ "Info" "ISTA_WORST_CASE_SLACK" "setup -4.836 " "Info: Worst-case setup slack is -4.836" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack End Point TNS Clock  " "Info:     Slack End Point TNS Clock " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "Info: ========= ============= =====================" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   -4.836      -180.460 rst  " "Info:    -4.836      -180.460 rst " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}  } {  } 0 0 "Worst-case %1!s! slack is %2!s!" 0 0 "" 0 -1}
{ "Info" "ISTA_WORST_CASE_SLACK" "hold -4.309 " "Info: Worst-case hold slack is -4.309" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack End Point TNS Clock  " "Info:     Slack End Point TNS Clock " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "Info: ========= ============= =====================" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   -4.309      -148.342 rst  " "Info:    -4.309      -148.342 rst " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}  } {  } 0 0 "Worst-case %1!s! slack is %2!s!" 0 0 "" 0 -1}
{ "Info" "ISTA_WORST_CASE_SLACK" "recovery -1.072 " "Info: Worst-case recovery slack is -1.072" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack End Point TNS Clock  " "Info:     Slack End Point TNS Clock " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "Info: ========= ============= =====================" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   -1.072       -34.646 rst  " "Info:    -1.072       -34.646 rst " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}  } {  } 0 0 "Worst-case %1!s! slack is %2!s!" 0 0 "" 0 -1}
{ "Info" "ISTA_WORST_CASE_SLACK" "removal -3.698 " "Info: Worst-case removal slack is -3.698" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack End Point TNS Clock  " "Info:     Slack End Point TNS Clock " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "Info: ========= ============= =====================" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   -3.698      -130.017 rst  " "Info:    -3.698      -130.017 rst " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}  } {  } 0 0 "Worst-case %1!s! slack is %2!s!" 0 0 "" 0 -1}
{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -3.339 " "Info: Worst-case minimum pulse width slack is -3.339" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack End Point TNS Clock  " "Info:     Slack End Point TNS Clock " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "Info: ========= ============= =====================" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   -3.339     -1055.391 rst  " "Info:    -3.339     -1055.391 rst " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}  } {  } 0 0 "Worst-case %1!s! slack is %2!s!" 0 0 "" 0 -1}
{ "Info" "0" "" "Info: Analyzing Slow 1100mV 0C Model" {  } {  } 0 0 "Analyzing Slow 1100mV 0C Model" 0 0 "" 0 -1}