ncsim.log

一个支持精简指令的16位的risc cpu

ncsim: 05.00-p001: (c) Copyright 1995-2003 Cadence Design Systems, Inc.

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Relinquished control to SimVision...
ncsim> source "d:/Program Files/Cadence Design Systems/LDV/tools/inca/files/ncsimrc"
ncsim> database -open waves -into waves.shm -default
Created default SHM database waves
ncsim> probe -create -shm cpu_test.write cpu_test.reset cpu_test.read cpu_test.ram_out cpu_test.halt cpu_test.data_out cpu_test.clock cpu_test.addr cpu_test.PC_addr cpu_test.IR_addr
Created probe 1
ncsim> run
ram loaded successfully!
                   0   0001    0000
Simulation interrupted at 254327500 NS + 0
ncsim> ^C
ncsim> exit
ncsim: Memory Usage - 17.3M data 
ncsim: CPU Usage - 0.2s system + 1.7s user = 1.9s total (20.4s, 9.3% cpu)