qep_data_bus.hif

基于地址总线接口的四倍频编码器信号接口的 FPGA实现 Verilog HDL的

PARAMETER_UNKNOWN
USR
USE_WYS
OFF
PARAMETER_UNKNOWN
DEF
STYLE
FAST
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
add_sub_bfg
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
add_sub
dataa0
dataa10
dataa11
dataa12
dataa13
dataa14
dataa15
dataa1
dataa2
dataa3
dataa4
dataa5
dataa6
dataa7
dataa8
dataa9
datab0
datab10
datab11
datab12
datab13
datab14
datab15
datab1
datab2
datab3
datab4
datab5
datab6
datab7
datab8
datab9
result0
result10
result11
result12
result13
result14
result15
result1
result2
result3
result4
result5
result6
result7
result8
result9
}
# include_file {
d:|altera|quartus50|libraries|megafunctions|aglobal50.inc
1118942284
d:|altera|quartus50|libraries|megafunctions|addcore.inc
1107572218
d:|altera|quartus50|libraries|megafunctions|look_add.inc
1107574364
d:|altera|quartus50|libraries|megafunctions|bypassff.inc
1107573920
d:|altera|quartus50|libraries|megafunctions|altshift.inc
1107573438
d:|altera|quartus50|libraries|megafunctions|alt_stratix_add_sub.inc
1107572606
d:|altera|quartus50|libraries|megafunctions|alt_mercury_add_sub.inc
1107572592
}
# end
# entity
qep4
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
qep4.v
1134394294
7
# storage
db|qep_data_bus.(10).cnf
db|qep_data_bus.(10).cnf
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
qep4:t_qep4_0
qep4:t_qep4_1
qep4:t_qep4_2
qep4:t_qep4_3
qep4:t_qep4_4
qep4:t_qep4_5
}
# end
# entity
lpm_add_sub
# case_insensitive
# source_file
d:|altera|quartus50|libraries|megafunctions|lpm_add_sub.tdf
1114012446
6
# storage
db|qep_data_bus.(25).cnf
db|qep_data_bus.(25).cnf
# user_parameter {
LPM_WIDTH
16
PARAMETER_UNKNOWN
USR
LPM_REPRESENTATION
UNSIGNED
PARAMETER_UNKNOWN
USR
LPM_DIRECTION
ADD
PARAMETER_UNKNOWN
USR
ONE_INPUT_IS_CONSTANT
YES
PARAMETER_UNKNOWN
USR
LPM_PIPELINE
0
PARAMETER_UNKNOWN
DEF
MAXIMIZE_SPEED
5
PARAMETER_UNKNOWN
DEF
REGISTERED_AT_END
0
PARAMETER_UNKNOWN
DEF
OPTIMIZE_FOR_SPEED
1
PARAMETER_UNKNOWN
USR
USE_CS_BUFFERS
1
PARAMETER_UNKNOWN
DEF
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CARRY_CHAIN_LENGTH
48
CARRY_CHAIN_LENGTH
USR
DEVICE_FAMILY
FLEX10KA
PARAMETER_UNKNOWN
USR
USE_WYS
OFF
PARAMETER_UNKNOWN
DEF
STYLE
FAST
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
add_sub_chh
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
dataa0
dataa10
dataa11
dataa12
dataa13
dataa14
dataa15
dataa1
dataa2
dataa3
dataa4
dataa5
dataa6
dataa7
dataa8
dataa9
datab0
datab10
datab11
datab12
datab13
datab14
datab15
datab1
datab2
datab3
datab4
datab5
datab6
datab7
datab8
datab9
result0
result10
result11
result12
result13
result14
result15
result1
result2
result3
result4
result5
result6
result7
result8
result9
}
# include_file {
d:|altera|quartus50|libraries|megafunctions|aglobal50.inc
1118942284
d:|altera|quartus50|libraries|megafunctions|addcore.inc
1107572218
d:|altera|quartus50|libraries|megafunctions|look_add.inc
1107574364
d:|altera|quartus50|libraries|megafunctions|bypassff.inc
1107573920
d:|altera|quartus50|libraries|megafunctions|altshift.inc
1107573438
d:|altera|quartus50|libraries|megafunctions|alt_stratix_add_sub.inc
1107572606
d:|altera|quartus50|libraries|megafunctions|alt_mercury_add_sub.inc
1107572592
}
# end
# entity
addcore
# case_insensitive
# source_file
d:|altera|quartus50|libraries|megafunctions|addcore.tdf
1114012446
6
# storage
db|qep_data_bus.(26).cnf
db|qep_data_bus.(26).cnf
# user_parameter {
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
width
16
PARAMETER_UNKNOWN
USR
REPRESENTATION
UNSIGNED
PARAMETER_UNKNOWN
USR
DIRECTION
ADD
PARAMETER_UNKNOWN
USR
USE_CS_BUFFERS
1
PARAMETER_UNKNOWN
USR
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CARRY_CHAIN_LENGTH
48
CARRY_CHAIN_LENGTH
USR
DEVICE_FAMILY
FLEX10KA
PARAMETER_UNKNOWN
USR
}
# used_port {
dataa0
dataa1
dataa2
dataa3
dataa4
dataa5
dataa6
dataa7
dataa8
dataa9
dataa10
dataa11
dataa12
dataa13
dataa14
dataa15
datab0
datab1
datab2
datab3
datab4
datab5
datab6
datab7
datab8
datab9
datab10
datab11
datab12
datab13
datab14
datab15
result0
result1
result2
result3
result4
result5
result6
result7
result8
result9
result10
result11
result12
result13
result14
result15
}
# include_file {
d:|altera|quartus50|libraries|megafunctions|aglobal50.inc
1118942284
d:|altera|quartus50|libraries|megafunctions|addcore.inc
1107572218
d:|altera|quartus50|libraries|megafunctions|a_csnbuffer.inc
1107571892
}
# end
# entity
lpm_add_sub
# case_insensitive
# source_file
d:|altera|quartus50|libraries|megafunctions|lpm_add_sub.tdf
1114012446
6
# storage
db|qep_data_bus.(27).cnf
db|qep_data_bus.(27).cnf
# user_parameter {
LPM_WIDTH
16
PARAMETER_UNKNOWN
USR
LPM_REPRESENTATION
UNSIGNED
PARAMETER_UNKNOWN
USR
LPM_DIRECTION
ADD
PARAMETER_UNKNOWN
USR
ONE_INPUT_IS_CONSTANT
YES
PARAMETER_UNKNOWN
USR
LPM_PIPELINE
0
PARAMETER_UNKNOWN
DEF
MAXIMIZE_SPEED
5
PARAMETER_UNKNOWN
DEF
REGISTERED_AT_END
0
PARAMETER_UNKNOWN
DEF
OPTIMIZE_FOR_SPEED
1
PARAMETER_UNKNOWN
USR
USE_CS_BUFFERS
1
PARAMETER_UNKNOWN
DEF
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CARRY_CHAIN_LENGTH
48
CARRY_CHAIN_LENGTH
USR
DEVICE_FAMILY
FLEX10KA
PARAMETER_UNKNOWN
USR
USE_WYS
OFF
PARAMETER_UNKNOWN
DEF
STYLE
FAST
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
add_sub_6sh
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
cin
dataa0
dataa10
dataa11
dataa12
dataa13
dataa14
dataa15
dataa1
dataa2
dataa3
dataa4
dataa5
dataa6
dataa7
dataa8
dataa9
datab0
datab10
datab11
datab12
datab13
datab14
datab15
datab1
datab2
datab3
datab4
datab5
datab6
datab7
datab8
datab9
result0
result10
result11
result12
result13
result14
result15
result1
result2
result3
result4
result5
result6
result7
result8
result9
}
# include_file {
d:|altera|quartus50|libraries|megafunctions|aglobal50.inc
1118942284
d:|altera|quartus50|libraries|megafunctions|addcore.inc
1107572218
d:|altera|quartus50|libraries|megafunctions|look_add.inc
1107574364
d:|altera|quartus50|libraries|megafunctions|bypassff.inc
1107573920
d:|altera|quartus50|libraries|megafunctions|altshift.inc
1107573438
d:|altera|quartus50|libraries|megafunctions|alt_stratix_add_sub.inc
1107572606
d:|altera|quartus50|libraries|megafunctions|alt_mercury_add_sub.inc
1107572592
}
# end
# entity
addcore
# case_insensitive
# source_file
d:|altera|quartus50|libraries|megafunctions|addcore.tdf
1114012446
6
# storage
db|qep_data_bus.(28).cnf
db|qep_data_bus.(28).cnf
# user_parameter {
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
width
16
PARAMETER_UNKNOWN
USR
REPRESENTATION
UNSIGNED
PARAMETER_UNKNOWN
USR
DIRECTION
ADD
PARAMETER_UNKNOWN
USR
USE_CS_BUFFERS
1
PARAMETER_UNKNOWN
USR
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CARRY_CHAIN_LENGTH
48
CARRY_CHAIN_LENGTH
USR
DEVICE_FAMILY
FLEX10KA
PARAMETER_UNKNOWN
USR
}
# used_port {
dataa0
dataa1
dataa2
dataa3
dataa4
dataa5
dataa6
dataa7
dataa8
dataa9
dataa10
dataa11
dataa12
dataa13
dataa14
dataa15
datab0
datab1
datab2
datab3
datab4
datab5
datab6
datab7
datab8
datab9
datab10
datab11
datab12
datab13
datab14
datab15
cin
result0
result1
result2
result3
result4
result5
result6
result7
result8
result9
result10
result11
result12
result13
result14
result15
}
# include_file {
d:|altera|quartus50|libraries|megafunctions|aglobal50.inc
1118942284
d:|altera|quartus50|libraries|megafunctions|addcore.inc
1107572218
d:|altera|quartus50|libraries|megafunctions|a_csnbuffer.inc
1107571892
}
# end
# entity
clk_gen
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
clk_gen.v
1134626270
7
# storage
db|qep_data_bus.(29).cnf
db|qep_data_bus.(29).cnf
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# end
# entity
qep_data_bus
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
qep_data_bus.v
1134647960
7
# storage
db|qep_data_bus.(8).cnf
db|qep_data_bus.(8).cnf
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
|
}
# end
# entity
cnt_pulse
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
cnt_pulse.v
1134647504
7
# storage
db|qep_data_bus.(12).cnf
db|qep_data_bus.(12).cnf
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
cnt_pulse:t_cnt_pulse_0
cnt_pulse:t_cnt_pulse_1
cnt_pulse:t_cnt_pulse_2
cnt_pulse:t_cnt_pulse_3
cnt_pulse:t_cnt_pulse_4
cnt_pulse:t_cnt_pulse_5
}
# end
# entity
disp
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
disp.v
1134650048
7
# storage
db|qep_data_bus.(11).cnf
db|qep_data_bus.(11).cnf
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
Idle
0
PARAMETER_BIN
DEF
Read
1
PARAMETER_BIN
DEF
}
# hierarchies {
disp:t_disp
}
# end
# entity
data_bus
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
data_bus.v
1134652568
7
# storage
db|qep_data_bus.(9).cnf
db|qep_data_bus.(9).cnf
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
TRUE
1
PARAMETER_BIN
DEF
FALSE
0
PARAMETER_BIN
DEF
}
# hierarchies {
data_bus:t_data_bus
}
# end
# complete