w1.prj

Systemverilog 编写的贩卖机代码

[Project ID]
Signature=UE Proj: v.1
[Project Information]
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Working Time=16687
[Files]
0=Add_full.v
1=Add_half.v
2=Add_rca_4.v
3=Add_rca_16.v
4=t_Add_rca_16.v
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