top_start.vhd

这是一个I2C串行数据通信协议以VHDL硬件描述语言实现的IP核

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity top_start is
port(
     reset,fcore,fi2c,start_i,stop_i:in std_logic;
     tx:in std_logic_vector(7 downto 0);
     --sda_in:in std_logic;
     exnt_ack:out std_logic;
     scl:out std_logic;
     ack_i: buffer std_logic;
     sda:inout std_logic
     );
end top_start;
architecture behav of top_start is
component i2c_top
port(reset,fcore:      in std_logic;
     start_i,stop_i:  in std_logic;
     wr,shift_i1,ack_i,extpp,stp_i: in std_logic;
     strb,shift_temp,stop_en,ack_en: out std_logic;
     shift_en1:buffer std_logic;
     scl:            out std_logic;
     sda:            out std_logic
    );
end component;
component i2c_start
port(
     fcore,reset:in std_logic;
     strb: in std_logic;
     sda,wr,scl:out std_logic
    );
end component;
component tshft_shft
port(
     fi2c,reset,fcore:in std_logic;
     tx:in std_logic_vector(7 downto 0);
     shift_temp,shift_en1:in std_logic;
     shift_i1:out std_logic;
     scl,sda:out std_logic);
end component;
component i2c_ack1
port(
     fcore,reset: in std_logic;
     sda,ack_en:in std_logic;
     ack_i,extpp:buffer std_logic;
     scl,exnt_ack:out std_logic
    );
end component;
component i2c_stop
port(
     fcore,reset:in std_logic; 
     stop_en:in std_logic;
     sda,stp_i,scl:out std_logic
    );
end component;

signal sda_out: std_logic;
signal scl_top,sda_top,scl_start,sda_start,scl_shft,sda_ack,sda_shft,scl_ack,extpp,stop_en,stp_i:std_logic;
signal strb,wr,shift_again,shift_en1,shift_i1,shift_temp,ack_en,scl_stop,sda_stop:std_logic;
begin
scl<=scl_top and (scl_start or scl_shft or scl_ack or scl_stop);
sda_out<=sda_top and (sda_start or sda_shft or sda_stop);
sda_ack<=sda;
sda<=sda_out when ack_en='0' else
    'Z';
u1:i2c_top port map(reset,fcore,start_i,stop_i,wr,shift_i1,ack_i,extpp,stp_i,
                    strb,shift_temp,stop_en,ack_en,shift_en1,scl_top,sda_top);
u2:i2c_start port map(fcore,reset,strb,sda_start,wr,scl_start);
u3:tshft_shft port map(fi2c,reset,fcore,tx,shift_temp,shift_en1,shift_i1,
                      scl_shft,sda_shft);
u4:i2c_ack1 port map(fcore,reset,sda_ack,ack_en,ack_i,extpp,scl_ack,exnt_ack);
u5:i2c_stop port map(fcore,reset,stop_en,sda_stop,stp_i,scl_stop);
end behav;