clkscan1_old.fit

此设计采用Verilog HDL硬件语言设计,在掌宇开发板上实现. 将整个电路分为两个子模块

-- MAX+plus II Compiler Fit File      
-- Version 10.1 06/12/2001            
-- Compiled: 05/28/2003 12:00:06      

-- Copyright (C) 1988-2001 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera.  Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner.  Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors.  No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.

CHIP "clkscan1_old"
BEGIN

    DEVICE = "EPF10K10LC84-3";

    "clk"                          : INPUT_PIN  = 43     ;
    "reset"                        : INPUT_PIN  = 2      ;
    "start"                        : INPUT_PIN  = 1      ;
    "scan_data0"                   : OUTPUT_PIN = 61     ;
    "scan_data1"                   : OUTPUT_PIN = 58     ;
    "scan_data2"                   : OUTPUT_PIN = 60     ;
    "scan_data3"                   : OUTPUT_PIN = 59     ;
    "scan_en0"                     : OUTPUT_PIN = 30     ;
    "scan_en1"                     : OUTPUT_PIN = 23     ;
    "scan_en2"                     : OUTPUT_PIN = 66     ;
    "scan_en3"                     : OUTPUT_PIN = 70     ;
    "scan_en4"                     : OUTPUT_PIN = 65     ;
    "scan_en5"                     : OUTPUT_PIN = 29     ;
    ":23"                          : LOCATION   = LC3_C13;
    ":40"                          : LOCATION   = LC6_C13;
    ":41"                          : LOCATION   = LC1_C13;
    ":42"                          : LOCATION   = LC4_C24;
    ":53"                          : LOCATION   = LC1_C24;  -- enable
    ":55"                          : LOCATION   = LC7_C13;  -- count3
    ":56"                          : LOCATION   = LC2_C13;  -- count2
    ":57"                          : LOCATION   = LC5_C24;  -- count1
    ":58"                          : LOCATION   = LC3_C24;  -- count0
    ":93"                          : LOCATION   = LC5_C13;
    ":94"                          : LOCATION   = LC4_C13;
    ":95"                          : LOCATION   = LC6_C24;
    ":96"                          : LOCATION   = LC2_C24;
    ":103"                         : LOCATION   = LC5_C5 ;
    ":104"                         : LOCATION   = LC5_B13;
    ":105"                         : LOCATION   = LC8_A16;
    ":106"                         : LOCATION   = LC3_B19;
    ":107"                         : LOCATION   = LC4_B5 ;
    ":108"                         : LOCATION   = LC7_C1 ;

END;

INTERNAL_INFO "clkscan1_old"
BEGIN
	DEVICE = EPF10K10LC84-3;
    OD5P43  : LORAX = "1:FB5->LC7_C13,->LC2_C13,->LC5_C24,->LC3_C24,->LC5_C13,->LC4_C13,->LC6_C24,->LC2_C24,->LC5_C5,->LC5_B13,->LC8_A16,->LC3_B19,->LC4_B5,->LC7_C1|";
    OD1P2   : LORAX = "1:FB1->LC1_C24,->LC7_C13,->LC2_C13,->LC5_C24,->LC3_C24|2:FH1R2|3:PA20R2C12->LC5_C13,->LC4_C13,->LC7_C13,->LC2_C13|,3:PA20R2C23->LC6_C24,->LC2_C24,->LC1_C24,->LC5_C24,->LC3_C24|||";
    OD4P1   : LORAX = "1:FB4->LC1_C24|";
    LC3_C13 : LORAX = "1:MSW2R2C12,HHR3R2,PA19R2C23->LC4_C24,->LC5_C24,->LC3_C24,->LC2_C24|";
    LC1_C24 : LORAX = "1:MSW0R2C23,HHR20R2,PA16R2C12->LC7_C13,->LC2_C13,->LC5_C13,->LC4_C13|";
    LC5_C24 : LORAX = "1:MSW4R2C23,HHR30R2,PA5R2C12->LC3_C13,->LC6_C13,->LC1_C13|";
    LC3_C24 : LORAX = "1:MSW2R2C23,HHR15R2,PA0R2C12->LC3_C13,->LC6_C13,->LC1_C13|";
    LC5_C13 : LORAX = "1:MSW4R2C12,HHR41R2->OH4R2P59|";
    LC4_C13 : LORAX = "1:MSW3R2C12,HHR9R2->OH3R2P60|";
    LC6_C24 : LORAX = "1:MSW6R2C22,HHR31R2->OH6R2P58|";
    LC2_C24 : LORAX = "1:MSW2R2C22,HHR0R2->OH2R2P61|";
    LC5_C5  : LORAX = "1:MSW4R2C4,G62R2->OH12R2P29|";
    LC5_B13 : LORAX = "1:MSW4R1C12,HHR41R1->OH4R1P65|";
    LC8_A16 : LORAX = "1:MSW4R0C14,G69R0->OH4R0P70|";
    LC3_B19 : LORAX = "1:MSW2R1C18,G12R1->OH2R1P66|";
    LC4_B5  : LORAX = "1:MSW3R1C4,HHL7R1->OH11R1P23|";
    LC7_C1  : LORAX = "1:MSW6R2C1,G53R2->OH14R2P30|";
	LC3_C13 : LORAX2 = "LC7_C13, LC5_C24, LC2_C13, LC3_C24";
	LC6_C13 : LORAX2 = "LC7_C13, LC5_C24, LC2_C13, LC3_C24";
	LC1_C13 : LORAX2 = "LC2_C13, LC5_C24, LC3_C13, LC3_C24";
	LC4_C24 : LORAX2 = "X, LC5_C24, LC3_C13, LC3_C24";
	LC7_C13 : LORAX2 = "LC1_C24, X, X, LC6_C13";
	LC2_C13 : LORAX2 = "LC1_C24, X, X, LC1_C13";
	LC5_C24 : LORAX2 = "LC1_C24, LC5_C24, LC3_C13, LC3_C24";
	LC3_C24 : LORAX2 = "LC1_C24, X, LC3_C13, LC3_C24";
	LC5_C13 : LORAX2 = "OD1P2, LC1_C24, LC6_C13, LC7_C13";
	LC4_C13 : LORAX2 = "OD1P2, LC1_C24, LC2_C13, LC1_C13";
	LC6_C24 : LORAX2 = "OD1P2, LC1_C24, LC5_C24, LC4_C24";
	LC2_C24 : LORAX2 = "OD1P2, LC1_C24, LC3_C24, LC3_C13";
END;