config_controller.qsf

用VHDL硬件描述语言实现的对FPGA（Cyclone II）的配置的VHDL源代码。

# Copyright (C) 1991-2004 Altera Corporation
# Any  megafunction  design,  and related netlist (encrypted  or  decrypted),
# support information,  device programming or simulation file,  and any other
# associated  documentation or information  provided by  Altera  or a partner
# under  Altera's   Megafunction   Partnership   Program  may  be  used  only
# to program  PLD  devices (but not masked  PLD  devices) from  Altera.   Any
# other  use  of such  megafunction  design,  netlist,  support  information,
# device programming or simulation file,  or any other  related documentation
# or information  is prohibited  for  any  other purpose,  including, but not
# limited to  modification,  reverse engineering,  de-compiling, or use  with
# any other  silicon devices,  unless such use is  explicitly  licensed under
# a separate agreement with  Altera  or a megafunction partner.  Title to the
# intellectual property,  including patents,  copyrights,  trademarks,  trade
# secrets,  or maskworks,  embodied in any such megafunction design, netlist,
# support  information,  device programming or simulation file,  or any other
# related documentation or information provided by  Altera  or a megafunction
# partner, remains with Altera, the megafunction partner, or their respective
# licensors. No other licenses, including any licenses needed under any third
# party's intellectual property, are provided herein.


# The default values for assignments are stored in the file
#		config_controller_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


# Project-Wide Assignments
# ========================
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 4.2
set_global_assignment -name PROJECT_CREATION_TIME_DATE "22:55:37  JUNE 05, 2005"
set_global_assignment -name LAST_QUARTUS_VERSION 4.1
set_global_assignment -name VHDL_FILE data_bit_counter.vhd
set_global_assignment -name VHDL_FILE dclk_divider.vhd
set_global_assignment -name VHDL_FILE shift_register.vhd
set_global_assignment -name VHDL_FILE address_counter.vhd
set_global_assignment -name VHDL_FILE config_controller.vhd
set_global_assignment -name VECTOR_WAVEFORM_FILE config_controller.vwf
set_global_assignment -name VECTOR_WAVEFORM_FILE config_controller.sim.vwf
set_global_assignment -name SOURCE_FILE config_controller1.sim

# Pin & Location Assignments
# ==========================
set_location_assignment PIN_1 -to a\[0\]
set_location_assignment PIN_14 -to a\[10\]
set_location_assignment PIN_16 -to a\[11\]
set_location_assignment PIN_17 -to a\[12\]
set_location_assignment PIN_19 -to a\[13\]
set_location_assignment PIN_20 -to a\[14\]
set_location_assignment PIN_21 -to a\[15\]
set_location_assignment PIN_22 -to a\[16\]
set_location_assignment PIN_23 -to a\[17\]
set_location_assignment PIN_24 -to a\[18\]
set_location_assignment PIN_25 -to a\[19\]
set_location_assignment PIN_2 -to a\[1\]
set_location_assignment PIN_5 -to a\[2\]
set_location_assignment PIN_6 -to a\[3\]
set_location_assignment PIN_7 -to a\[4\]
set_location_assignment PIN_8 -to a\[5\]
set_location_assignment PIN_9 -to a\[6\]
set_location_assignment PIN_10 -to a\[7\]
set_location_assignment PIN_12 -to a\[8\]
set_location_assignment PIN_13 -to a\[9\]
set_location_assignment PIN_85 -to config_done
set_location_assignment PIN_98 -to config_n
set_location_assignment PIN_97 -to DCLK
set_location_assignment PIN_71 -to D\[0\]
set_location_assignment PIN_72 -to D\[1\]
set_location_assignment PIN_75 -to D\[2\]
set_location_assignment PIN_76 -to D\[3\]
set_location_assignment PIN_77 -to D\[4\]
set_location_assignment PIN_78 -to D\[5\]
set_location_assignment PIN_79 -to D\[6\]
set_location_assignment PIN_80 -to D\[7\]
set_location_assignment PIN_89 -to reset_n
set_location_assignment PIN_92 -to status_n
set_location_assignment PIN_87 -to cpld_clkosc
set_location_assignment PIN_70 -to error_led
set_location_assignment PIN_27 -to flash_a20
set_location_assignment PIN_28 -to flash_a21
set_location_assignment PIN_29 -to flash_a22
set_location_assignment PIN_32 -to flash_cs_n
set_location_assignment PIN_30 -to flash_oe_n
set_location_assignment PIN_31 -to flash_rw_n
set_location_assignment PIN_61 -to flash_reset_n
set_location_assignment PIN_69 -to loading_led
set_location_assignment PIN_63 -to pld_data0
set_location_assignment PIN_64 -to pld_msel0
set_location_assignment PIN_65 -to pld_msel1
set_location_assignment PIN_67 -to user_led

# Analysis & Synthesis Assignments
# ================================
set_global_assignment -name FAMILY MAX7000AE
set_global_assignment -name TOP_LEVEL_ENTITY config_controller

# Fitter Assignments
# ==================
set_global_assignment -name DEVICE "EPM7128AETC100-7"

# Simulator Assignments
# =====================
set_global_assignment -name GLITCH_INTERVAL 1