sdr_test.hier_info

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|sdr_test
clk => clk.IN1
rst_n => rst_n.IN1
sdram_clk <= sys_ctrl:uut_sysctrl.sdram_clk
sdram_cke <= sdram_top:uut_sdramtop.sdram_cke
sdram_cs_n <= sdram_top:uut_sdramtop.sdram_cs_n
sdram_ras_n <= sdram_top:uut_sdramtop.sdram_ras_n
sdram_cas_n <= sdram_top:uut_sdramtop.sdram_cas_n
sdram_we_n <= sdram_top:uut_sdramtop.sdram_we_n
sdram_ba[0] <= sdram_top:uut_sdramtop.sdram_ba
sdram_ba[1] <= sdram_top:uut_sdramtop.sdram_ba
sdram_addr[0] <= sdram_top:uut_sdramtop.sdram_addr
sdram_addr[1] <= sdram_top:uut_sdramtop.sdram_addr
sdram_addr[2] <= sdram_top:uut_sdramtop.sdram_addr
sdram_addr[3] <= sdram_top:uut_sdramtop.sdram_addr
sdram_addr[4] <= sdram_top:uut_sdramtop.sdram_addr
sdram_addr[5] <= sdram_top:uut_sdramtop.sdram_addr
sdram_addr[6] <= sdram_top:uut_sdramtop.sdram_addr
sdram_addr[7] <= sdram_top:uut_sdramtop.sdram_addr
sdram_addr[8] <= sdram_top:uut_sdramtop.sdram_addr
sdram_addr[9] <= sdram_top:uut_sdramtop.sdram_addr
sdram_addr[10] <= sdram_top:uut_sdramtop.sdram_addr
sdram_addr[11] <= sdram_top:uut_sdramtop.sdram_addr
sdram_data[0] <> sdram_top:uut_sdramtop.sdram_data
sdram_data[1] <> sdram_top:uut_sdramtop.sdram_data
sdram_data[2] <> sdram_top:uut_sdramtop.sdram_data
sdram_data[3] <> sdram_top:uut_sdramtop.sdram_data
sdram_data[4] <> sdram_top:uut_sdramtop.sdram_data
sdram_data[5] <> sdram_top:uut_sdramtop.sdram_data
sdram_data[6] <> sdram_top:uut_sdramtop.sdram_data
sdram_data[7] <> sdram_top:uut_sdramtop.sdram_data
sdram_data[8] <> sdram_top:uut_sdramtop.sdram_data
sdram_data[9] <> sdram_top:uut_sdramtop.sdram_data
sdram_data[10] <> sdram_top:uut_sdramtop.sdram_data
sdram_data[11] <> sdram_top:uut_sdramtop.sdram_data
sdram_data[12] <> sdram_top:uut_sdramtop.sdram_data
sdram_data[13] <> sdram_top:uut_sdramtop.sdram_data
sdram_data[14] <> sdram_top:uut_sdramtop.sdram_data
sdram_data[15] <> sdram_top:uut_sdramtop.sdram_data
rs232_tx <= uart_ctrl:uut_uartctrl.rs232_tx
sdram_ldqm <= <GND>
sdram_udqm <= <GND>
led[0] <= led_test:uut_led_test.led
led[1] <= led_test:uut_led_test.led
led[2] <= led_test:uut_led_test.led
led[3] <= led_test:uut_led_test.led
rdf_dout[0] <= rdf_dout[0].DB_MAX_OUTPUT_PORT_TYPE
rdf_dout[1] <= rdf_dout[1].DB_MAX_OUTPUT_PORT_TYPE
rdf_dout[2] <= rdf_dout[2].DB_MAX_OUTPUT_PORT_TYPE
rdf_dout[3] <= rdf_dout[3].DB_MAX_OUTPUT_PORT_TYPE
rdf_dout[4] <= rdf_dout[4].DB_MAX_OUTPUT_PORT_TYPE
rdf_dout[5] <= rdf_dout[5].DB_MAX_OUTPUT_PORT_TYPE
rdf_dout[6] <= rdf_dout[6].DB_MAX_OUTPUT_PORT_TYPE
rdf_dout[7] <= rdf_dout[7].DB_MAX_OUTPUT_PORT_TYPE
rdf_dout[8] <= sdfifo_ctrl:uut_sdffifoctrl.rdf_dout
rdf_dout[9] <= sdfifo_ctrl:uut_sdffifoctrl.rdf_dout
rdf_dout[10] <= sdfifo_ctrl:uut_sdffifoctrl.rdf_dout
rdf_dout[11] <= sdfifo_ctrl:uut_sdffifoctrl.rdf_dout
rdf_dout[12] <= sdfifo_ctrl:uut_sdffifoctrl.rdf_dout
rdf_dout[13] <= sdfifo_ctrl:uut_sdffifoctrl.rdf_dout
rdf_dout[14] <= sdfifo_ctrl:uut_sdffifoctrl.rdf_dout
rdf_dout[15] <= sdfifo_ctrl:uut_sdffifoctrl.rdf_dout


|sdr_test|sys_ctrl:uut_sysctrl
clk => clk.IN1
rst_n => sysrst_nr0.IN1
rst_n => rst_r1.PRESET
rst_n => rst_r2.PRESET
sys_rst_n <= sysrst_nr2.DB_MAX_OUTPUT_PORT_TYPE
clk_25m <= PLL_ctrl:uut_PLL_ctrl.c0
clk_100m <= PLL_ctrl:uut_PLL_ctrl.c1
sdram_clk <= PLL_ctrl:uut_PLL_ctrl.e0


|sdr_test|sys_ctrl:uut_sysctrl|PLL_ctrl:uut_PLL_ctrl
areset => areset.IN1
inclk0 => sub_wire7[0].IN1
c0 <= altpll:altpll_component.clk
c1 <= altpll:altpll_component.clk
e0 <= altpll:altpll_component.extclk
locked <= altpll:altpll_component.locked


|sdr_test|sys_ctrl:uut_sysctrl|PLL_ctrl:uut_PLL_ctrl|altpll:altpll_component
inclk[0] => pll.CLK
inclk[1] => ~NO_FANOUT~
fbin => ~NO_FANOUT~
pllena => ~NO_FANOUT~
clkswitch => ~NO_FANOUT~
areset => pll.ARESET
pfdena => ~NO_FANOUT~
clkena[0] => ~NO_FANOUT~
clkena[1] => ~NO_FANOUT~
clkena[2] => ~NO_FANOUT~
clkena[3] => ~NO_FANOUT~
clkena[4] => ~NO_FANOUT~
clkena[5] => ~NO_FANOUT~
extclkena[0] => ~NO_FANOUT~
extclkena[1] => ~NO_FANOUT~
extclkena[2] => ~NO_FANOUT~
extclkena[3] => ~NO_FANOUT~
scanclk => ~NO_FANOUT~
scanclkena => ~NO_FANOUT~
scanaclr => ~NO_FANOUT~
scanread => ~NO_FANOUT~
scanwrite => ~NO_FANOUT~
scandata => ~NO_FANOUT~
phasecounterselect[0] => ~NO_FANOUT~
phasecounterselect[1] => ~NO_FANOUT~
phasecounterselect[2] => ~NO_FANOUT~
phasecounterselect[3] => ~NO_FANOUT~
phaseupdown => ~NO_FANOUT~
phasestep => ~NO_FANOUT~
configupdate => ~NO_FANOUT~
fbmimicbidir <> <GND>
clk[0] <= clk[0].DB_MAX_OUTPUT_PORT_TYPE
clk[1] <= clk[1].DB_MAX_OUTPUT_PORT_TYPE
clk[2] <= clk[2].DB_MAX_OUTPUT_PORT_TYPE
clk[3] <= <GND>
clk[4] <= <GND>
clk[5] <= <GND>
extclk[0] <= pll.CLK2
extclk[1] <= <UNC>
extclk[2] <= <UNC>
extclk[3] <= <UNC>
clkbad[0] <= <GND>
clkbad[1] <= <GND>
enable1 <= <GND>
enable0 <= <GND>
activeclock <= <GND>
clkloss <= <GND>
locked <= pll.LOCKED
scandataout <= <GND>
scandone <= <GND>
sclkout0 <= <GND>
sclkout1 <= sclkout1.DB_MAX_OUTPUT_PORT_TYPE
phasedone <= <GND>
vcooverrange <= <GND>
vcounderrange <= <GND>
fbout <= <GND>
fref <= <GND>
icdrclk <= <GND>


|sdr_test|sdram_top:uut_sdramtop
clk => clk.IN3
rst_n => rst_n.IN3
sys_en => sys_en.IN1
sdram_wr_ack <= sdram_ctrl:module_001.sdram_wr_ack
sdram_rd_ack <= sdram_ctrl:module_001.sdram_rd_ack
sys_r_wn => sys_r_wn.IN2
sys_wraddr[0] => sys_wraddr[0].IN1
sys_wraddr[1] => sys_wraddr[1].IN1
sys_wraddr[2] => sys_wraddr[2].IN1
sys_wraddr[3] => sys_wraddr[3].IN1
sys_wraddr[4] => sys_wraddr[4].IN1
sys_wraddr[5] => sys_wraddr[5].IN1
sys_wraddr[6] => sys_wraddr[6].IN1
sys_wraddr[7] => sys_wraddr[7].IN1
sys_wraddr[8] => sys_wraddr[8].IN1
sys_wraddr[9] => sys_wraddr[9].IN1
sys_wraddr[10] => sys_wraddr[10].IN1
sys_wraddr[11] => sys_wraddr[11].IN1
sys_wraddr[12] => sys_wraddr[12].IN1
sys_wraddr[13] => sys_wraddr[13].IN1
sys_wraddr[14] => sys_wraddr[14].IN1
sys_wraddr[15] => sys_wraddr[15].IN1
sys_wraddr[16] => sys_wraddr[16].IN1
sys_wraddr[17] => sys_wraddr[17].IN1
sys_wraddr[18] => sys_wraddr[18].IN1
sys_wraddr[19] => sys_wraddr[19].IN1
sys_wraddr[20] => sys_wraddr[20].IN1
sys_wraddr[21] => sys_wraddr[21].IN1
sys_rdaddr[0] => sys_rdaddr[0].IN1
sys_rdaddr[1] => sys_rdaddr[1].IN1
sys_rdaddr[2] => sys_rdaddr[2].IN1
sys_rdaddr[3] => sys_rdaddr[3].IN1
sys_rdaddr[4] => sys_rdaddr[4].IN1
sys_rdaddr[5] => sys_rdaddr[5].IN1
sys_rdaddr[6] => sys_rdaddr[6].IN1
sys_rdaddr[7] => sys_rdaddr[7].IN1
sys_rdaddr[8] => sys_rdaddr[8].IN1
sys_rdaddr[9] => sys_rdaddr[9].IN1
sys_rdaddr[10] => sys_rdaddr[10].IN1
sys_rdaddr[11] => sys_rdaddr[11].IN1
sys_rdaddr[12] => sys_rdaddr[12].IN1
sys_rdaddr[13] => sys_rdaddr[13].IN1
sys_rdaddr[14] => sys_rdaddr[14].IN1
sys_rdaddr[15] => sys_rdaddr[15].IN1
sys_rdaddr[16] => sys_rdaddr[16].IN1
sys_rdaddr[17] => sys_rdaddr[17].IN1
sys_rdaddr[18] => sys_rdaddr[18].IN1
sys_rdaddr[19] => sys_rdaddr[19].IN1
sys_rdaddr[20] => sys_rdaddr[20].IN1
sys_rdaddr[21] => sys_rdaddr[21].IN1
sys_data_in[0] => sys_data_in[0].IN1
sys_data_in[1] => sys_data_in[1].IN1
sys_data_in[2] => sys_data_in[2].IN1
sys_data_in[3] => sys_data_in[3].IN1
sys_data_in[4] => sys_data_in[4].IN1
sys_data_in[5] => sys_data_in[5].IN1
sys_data_in[6] => sys_data_in[6].IN1
sys_data_in[7] => sys_data_in[7].IN1
sys_data_in[8] => sys_data_in[8].IN1
sys_data_in[9] => sys_data_in[9].IN1
sys_data_in[10] => sys_data_in[10].IN1
sys_data_in[11] => sys_data_in[11].IN1
sys_data_in[12] => sys_data_in[12].IN1
sys_data_in[13] => sys_data_in[13].IN1
sys_data_in[14] => sys_data_in[14].IN1
sys_data_in[15] => sys_data_in[15].IN1
sys_data_out[0] <= sdram_wr_data:module_003.sys_data_out
sys_data_out[1] <= sdram_wr_data:module_003.sys_data_out
sys_data_out[2] <= sdram_wr_data:module_003.sys_data_out
sys_data_out[3] <= sdram_wr_data:module_003.sys_data_out
sys_data_out[4] <= sdram_wr_data:module_003.sys_data_out
sys_data_out[5] <= sdram_wr_data:module_003.sys_data_out
sys_data_out[6] <= sdram_wr_data:module_003.sys_data_out
sys_data_out[7] <= sdram_wr_data:module_003.sys_data_out
sys_data_out[8] <= sdram_wr_data:module_003.sys_data_out
sys_data_out[9] <= sdram_wr_data:module_003.sys_data_out
sys_data_out[10] <= sdram_wr_data:module_003.sys_data_out
sys_data_out[11] <= sdram_wr_data:module_003.sys_data_out
sys_data_out[12] <= sdram_wr_data:module_003.sys_data_out
sys_data_out[13] <= sdram_wr_data:module_003.sys_data_out
sys_data_out[14] <= sdram_wr_data:module_003.sys_data_out
sys_data_out[15] <= sdram_wr_data:module_003.sys_data_out
sdram_busy <= sdram_ctrl:module_001.sdram_busy
sys_dout_rdy <= sdram_ctrl:module_001.sys_dout_rdy
sdram_cke <= sdram_cmd:module_002.sdram_cke
sdram_cs_n <= sdram_cmd:module_002.sdram_cs_n
sdram_ras_n <= sdram_cmd:module_002.sdram_ras_n
sdram_cas_n <= sdram_cmd:module_002.sdram_cas_n
sdram_we_n <= sdram_cmd:module_002.sdram_we_n
sdram_ba[0] <= sdram_cmd:module_002.sdram_ba
sdram_ba[1] <= sdram_cmd:module_002.sdram_ba
sdram_addr[0] <= sdram_cmd:module_002.sdram_addr
sdram_addr[1] <= sdram_cmd:module_002.sdram_addr
sdram_addr[2] <= sdram_cmd:module_002.sdram_addr
sdram_addr[3] <= sdram_cmd:module_002.sdram_addr
sdram_addr[4] <= sdram_cmd:module_002.sdram_addr
sdram_addr[5] <= sdram_cmd:module_002.sdram_addr
sdram_addr[6] <= sdram_cmd:module_002.sdram_addr
sdram_addr[7] <= sdram_cmd:module_002.sdram_addr
sdram_addr[8] <= sdram_cmd:module_002.sdram_addr
sdram_addr[9] <= sdram_cmd:module_002.sdram_addr
sdram_addr[10] <= sdram_cmd:module_002.sdram_addr
sdram_addr[11] <= sdram_cmd:module_002.sdram_addr
sdram_data[0] <> sdram_wr_data:module_003.sdram_data
sdram_data[1] <> sdram_wr_data:module_003.sdram_data
sdram_data[2] <> sdram_wr_data:module_003.sdram_data
sdram_data[3] <> sdram_wr_data:module_003.sdram_data
sdram_data[4] <> sdram_wr_data:module_003.sdram_data
sdram_data[5] <> sdram_wr_data:module_003.sdram_data
sdram_data[6] <> sdram_wr_data:module_003.sdram_data
sdram_data[7] <> sdram_wr_data:module_003.sdram_data
sdram_data[8] <> sdram_wr_data:module_003.sdram_data
sdram_data[9] <> sdram_wr_data:module_003.sdram_data
sdram_data[10] <> sdram_wr_data:module_003.sdram_data
sdram_data[11] <> sdram_wr_data:module_003.sdram_data
sdram_data[12] <> sdram_wr_data:module_003.sdram_data
sdram_data[13] <> sdram_wr_data:module_003.sdram_data
sdram_data[14] <> sdram_wr_data:module_003.sdram_data
sdram_data[15] <> sdram_wr_data:module_003.sdram_data
sdwr_byte[0] => sdwr_byte[0].IN2
sdwr_byte[1] => sdwr_byte[1].IN2
sdwr_byte[2] => sdwr_byte[2].IN2
sdwr_byte[3] => sdwr_byte[3].IN2
sdwr_byte[4] => sdwr_byte[4].IN2
sdwr_byte[5] => sdwr_byte[5].IN2
sdwr_byte[6] => sdwr_byte[6].IN2
sdwr_byte[7] => sdwr_byte[7].IN2
sdwr_byte[8] => sdwr_byte[8].IN2
sdrd_byte[0] => sdrd_byte[0].IN2
sdrd_byte[1] => sdrd_byte[1].IN2
sdrd_byte[2] => sdrd_byte[2].IN2
sdrd_byte[3] => sdrd_byte[3].IN2
sdrd_byte[4] => sdrd_byte[4].IN2
sdrd_byte[5] => sdrd_byte[5].IN2
sdrd_byte[6] => sdrd_byte[6].IN2
sdrd_byte[7] => sdrd_byte[7].IN2
sdrd_byte[8] => sdrd_byte[8].IN2


|sdr_test|sdram_top:uut_sdramtop|sdram_ctrl:module_001
clk => cnt_clk_r[0].CLK
clk => cnt_clk_r[1].CLK
clk => cnt_clk_r[2].CLK
clk => cnt_clk_r[3].CLK
clk => cnt_clk_r[4].CLK
clk => cnt_clk_r[5].CLK
clk => cnt_clk_r[6].CLK
clk => cnt_clk_r[7].CLK
clk => cnt_clk_r[8].CLK
clk => sdram_ref_req.CLK
clk => cnt_15us[0].CLK
clk => cnt_15us[1].CLK
clk => cnt_15us[2].CLK
clk => cnt_15us[3].CLK
clk => cnt_15us[4].CLK
clk => cnt_15us[5].CLK
clk => cnt_15us[6].CLK
clk => cnt_15us[7].CLK
clk => cnt_15us[8].CLK
clk => cnt_15us[9].CLK
clk => cnt_15us[10].CLK
clk => cnt_200us[0].CLK
clk => cnt_200us[1].CLK
clk => cnt_200us[2].CLK
clk => cnt_200us[3].CLK
clk => cnt_200us[4].CLK
clk => cnt_200us[5].CLK
clk => cnt_200us[6].CLK
clk => cnt_200us[7].CLK
clk => cnt_200us[8].CLK
clk => cnt_200us[9].CLK
clk => cnt_200us[10].CLK
clk => cnt_200us[11].CLK
clk => cnt_200us[12].CLK
clk => cnt_200us[13].CLK
clk => cnt_200us[14].CLK
clk => work_state_r~1.DATAIN
clk => init_state_r~2.DATAIN
rst_n => cnt_200us[0].ACLR
rst_n => cnt_200us[1].ACLR
rst_n => cnt_200us[2].ACLR
rst_n => cnt_200us[3].ACLR
rst_n => cnt_200us[4].ACLR
rst_n => cnt_200us[5].ACLR
rst_n => cnt_200us[6].ACLR
rst_n => cnt_200us[7].ACLR
rst_n => cnt_200us[8].ACLR
rst_n => cnt_200us[9].ACLR
rst_n => cnt_200us[10].ACLR
rst_n => cnt_200us[11].ACLR
rst_n => cnt_200us[12].ACLR
rst_n => cnt_200us[13].ACLR
rst_n => cnt_200us[14].ACLR
rst_n => cnt_clk_r[0].ACLR
rst_n => cnt_clk_r[1].ACLR
rst_n => cnt_clk_r[2].ACLR
rst_n => cnt_clk_r[3].ACLR
rst_n => cnt_clk_r[4].ACLR
rst_n => cnt_clk_r[5].ACLR
rst_n => cnt_clk_r[6].ACLR
rst_n => cnt_clk_r[7].ACLR
rst_n => cnt_clk_r[8].ACLR
rst_n => cnt_15us[0].ACLR
rst_n => cnt_15us[1].ACLR
rst_n => cnt_15us[2].ACLR
rst_n => cnt_15us[3].ACLR
rst_n => cnt_15us[4].ACLR
rst_n => cnt_15us[5].ACLR
rst_n => cnt_15us[6].ACLR
rst_n => cnt_15us[7].ACLR