sdr_test.hier_info

来自「sdram读写」· HIER_INFO 代码 · 共 1,777 行 · 第 1/5 页

rst_n => sys_r_wn~reg0.ACLR
wrf_din[0] => wrf_din[0].IN1
wrf_din[1] => wrf_din[1].IN1
wrf_din[2] => wrf_din[2].IN1
wrf_din[3] => wrf_din[3].IN1
wrf_din[4] => wrf_din[4].IN1
wrf_din[5] => wrf_din[5].IN1
wrf_din[6] => wrf_din[6].IN1
wrf_din[7] => wrf_din[7].IN1
wrf_din[8] => wrf_din[8].IN1
wrf_din[9] => wrf_din[9].IN1
wrf_din[10] => wrf_din[10].IN1
wrf_din[11] => wrf_din[11].IN1
wrf_din[12] => wrf_din[12].IN1
wrf_din[13] => wrf_din[13].IN1
wrf_din[14] => wrf_din[14].IN1
wrf_din[15] => wrf_din[15].IN1
wrf_wrreq => wrf_wrreq.IN1
sdram_wr_ack => sdram_wr_ack.IN1
sys_data_in[0] <= wrfifo:uut_wrfifo.q
sys_data_in[1] <= wrfifo:uut_wrfifo.q
sys_data_in[2] <= wrfifo:uut_wrfifo.q
sys_data_in[3] <= wrfifo:uut_wrfifo.q
sys_data_in[4] <= wrfifo:uut_wrfifo.q
sys_data_in[5] <= wrfifo:uut_wrfifo.q
sys_data_in[6] <= wrfifo:uut_wrfifo.q
sys_data_in[7] <= wrfifo:uut_wrfifo.q
sys_data_in[8] <= wrfifo:uut_wrfifo.q
sys_data_in[9] <= wrfifo:uut_wrfifo.q
sys_data_in[10] <= wrfifo:uut_wrfifo.q
sys_data_in[11] <= wrfifo:uut_wrfifo.q
sys_data_in[12] <= wrfifo:uut_wrfifo.q
sys_data_in[13] <= wrfifo:uut_wrfifo.q
sys_data_in[14] <= wrfifo:uut_wrfifo.q
sys_data_in[15] <= wrfifo:uut_wrfifo.q
sys_en <= sys_en~reg0.DB_MAX_OUTPUT_PORT_TYPE
sys_data_out[0] => sys_data_out[0].IN1
sys_data_out[1] => sys_data_out[1].IN1
sys_data_out[2] => sys_data_out[2].IN1
sys_data_out[3] => sys_data_out[3].IN1
sys_data_out[4] => sys_data_out[4].IN1
sys_data_out[5] => sys_data_out[5].IN1
sys_data_out[6] => sys_data_out[6].IN1
sys_data_out[7] => sys_data_out[7].IN1
sys_data_out[8] => sys_data_out[8].IN1
sys_data_out[9] => sys_data_out[9].IN1
sys_data_out[10] => sys_data_out[10].IN1
sys_data_out[11] => sys_data_out[11].IN1
sys_data_out[12] => sys_data_out[12].IN1
sys_data_out[13] => sys_data_out[13].IN1
sys_data_out[14] => sys_data_out[14].IN1
sys_data_out[15] => sys_data_out[15].IN1
rdf_rdreq => rdf_rdreq.IN1
sdram_rd_ack => sdram_rd_ack.IN1
rdf_dout[0] <= rdfifo:uut_rdfifo.q
rdf_dout[1] <= rdfifo:uut_rdfifo.q
rdf_dout[2] <= rdfifo:uut_rdfifo.q
rdf_dout[3] <= rdfifo:uut_rdfifo.q
rdf_dout[4] <= rdfifo:uut_rdfifo.q
rdf_dout[5] <= rdfifo:uut_rdfifo.q
rdf_dout[6] <= rdfifo:uut_rdfifo.q
rdf_dout[7] <= rdfifo:uut_rdfifo.q
rdf_dout[8] <= rdfifo:uut_rdfifo.q
rdf_dout[9] <= rdfifo:uut_rdfifo.q
rdf_dout[10] <= rdfifo:uut_rdfifo.q
rdf_dout[11] <= rdfifo:uut_rdfifo.q
rdf_dout[12] <= rdfifo:uut_rdfifo.q
rdf_dout[13] <= rdfifo:uut_rdfifo.q
rdf_dout[14] <= rdfifo:uut_rdfifo.q
rdf_dout[15] <= rdfifo:uut_rdfifo.q
sys_r_wn <= sys_r_wn~reg0.DB_MAX_OUTPUT_PORT_TYPE
syswr_done => sdram_rd_req.IN1
syswr_done => tx_start.IN1
syswr_done => sdram_wr_req.IN1
tx_start <= tx_start.DB_MAX_OUTPUT_PORT_TYPE


|sdr_test|sdfifo_ctrl:uut_sdffifoctrl|wrfifo:uut_wrfifo
data[0] => data[0].IN1
data[1] => data[1].IN1
data[2] => data[2].IN1
data[3] => data[3].IN1
data[4] => data[4].IN1
data[5] => data[5].IN1
data[6] => data[6].IN1
data[7] => data[7].IN1
data[8] => data[8].IN1
data[9] => data[9].IN1
data[10] => data[10].IN1
data[11] => data[11].IN1
data[12] => data[12].IN1
data[13] => data[13].IN1
data[14] => data[14].IN1
data[15] => data[15].IN1
rdclk => rdclk.IN1
rdreq => rdreq.IN1
wrclk => wrclk.IN1
wrreq => wrreq.IN1
q[0] <= dcfifo:dcfifo_component.q
q[1] <= dcfifo:dcfifo_component.q
q[2] <= dcfifo:dcfifo_component.q
q[3] <= dcfifo:dcfifo_component.q
q[4] <= dcfifo:dcfifo_component.q
q[5] <= dcfifo:dcfifo_component.q
q[6] <= dcfifo:dcfifo_component.q
q[7] <= dcfifo:dcfifo_component.q
q[8] <= dcfifo:dcfifo_component.q
q[9] <= dcfifo:dcfifo_component.q
q[10] <= dcfifo:dcfifo_component.q
q[11] <= dcfifo:dcfifo_component.q
q[12] <= dcfifo:dcfifo_component.q
q[13] <= dcfifo:dcfifo_component.q
q[14] <= dcfifo:dcfifo_component.q
q[15] <= dcfifo:dcfifo_component.q
wrusedw[0] <= dcfifo:dcfifo_component.wrusedw
wrusedw[1] <= dcfifo:dcfifo_component.wrusedw
wrusedw[2] <= dcfifo:dcfifo_component.wrusedw
wrusedw[3] <= dcfifo:dcfifo_component.wrusedw
wrusedw[4] <= dcfifo:dcfifo_component.wrusedw
wrusedw[5] <= dcfifo:dcfifo_component.wrusedw
wrusedw[6] <= dcfifo:dcfifo_component.wrusedw
wrusedw[7] <= dcfifo:dcfifo_component.wrusedw
wrusedw[8] <= dcfifo:dcfifo_component.wrusedw


|sdr_test|sdfifo_ctrl:uut_sdffifoctrl|wrfifo:uut_wrfifo|dcfifo:dcfifo_component
data[0] => dcfifo_aal1:auto_generated.data[0]
data[1] => dcfifo_aal1:auto_generated.data[1]
data[2] => dcfifo_aal1:auto_generated.data[2]
data[3] => dcfifo_aal1:auto_generated.data[3]
data[4] => dcfifo_aal1:auto_generated.data[4]
data[5] => dcfifo_aal1:auto_generated.data[5]
data[6] => dcfifo_aal1:auto_generated.data[6]
data[7] => dcfifo_aal1:auto_generated.data[7]
data[8] => dcfifo_aal1:auto_generated.data[8]
data[9] => dcfifo_aal1:auto_generated.data[9]
data[10] => dcfifo_aal1:auto_generated.data[10]
data[11] => dcfifo_aal1:auto_generated.data[11]
data[12] => dcfifo_aal1:auto_generated.data[12]
data[13] => dcfifo_aal1:auto_generated.data[13]
data[14] => dcfifo_aal1:auto_generated.data[14]
data[15] => dcfifo_aal1:auto_generated.data[15]
q[0] <= dcfifo_aal1:auto_generated.q[0]
q[1] <= dcfifo_aal1:auto_generated.q[1]
q[2] <= dcfifo_aal1:auto_generated.q[2]
q[3] <= dcfifo_aal1:auto_generated.q[3]
q[4] <= dcfifo_aal1:auto_generated.q[4]
q[5] <= dcfifo_aal1:auto_generated.q[5]
q[6] <= dcfifo_aal1:auto_generated.q[6]
q[7] <= dcfifo_aal1:auto_generated.q[7]
q[8] <= dcfifo_aal1:auto_generated.q[8]
q[9] <= dcfifo_aal1:auto_generated.q[9]
q[10] <= dcfifo_aal1:auto_generated.q[10]
q[11] <= dcfifo_aal1:auto_generated.q[11]
q[12] <= dcfifo_aal1:auto_generated.q[12]
q[13] <= dcfifo_aal1:auto_generated.q[13]
q[14] <= dcfifo_aal1:auto_generated.q[14]
q[15] <= dcfifo_aal1:auto_generated.q[15]
rdclk => dcfifo_aal1:auto_generated.rdclk
rdreq => dcfifo_aal1:auto_generated.rdreq
wrclk => dcfifo_aal1:auto_generated.wrclk
wrreq => dcfifo_aal1:auto_generated.wrreq
aclr => ~NO_FANOUT~
rdempty <= <UNC>
rdfull <= <UNC>
wrempty <= <GND>
wrfull <= <GND>
rdusedw[0] <= <UNC>
rdusedw[1] <= <UNC>
rdusedw[2] <= <UNC>
rdusedw[3] <= <UNC>
rdusedw[4] <= <UNC>
rdusedw[5] <= <UNC>
rdusedw[6] <= <UNC>
rdusedw[7] <= <UNC>
rdusedw[8] <= <UNC>
wrusedw[0] <= dcfifo_aal1:auto_generated.wrusedw[0]
wrusedw[1] <= dcfifo_aal1:auto_generated.wrusedw[1]
wrusedw[2] <= dcfifo_aal1:auto_generated.wrusedw[2]
wrusedw[3] <= dcfifo_aal1:auto_generated.wrusedw[3]
wrusedw[4] <= dcfifo_aal1:auto_generated.wrusedw[4]
wrusedw[5] <= dcfifo_aal1:auto_generated.wrusedw[5]
wrusedw[6] <= dcfifo_aal1:auto_generated.wrusedw[6]
wrusedw[7] <= dcfifo_aal1:auto_generated.wrusedw[7]
wrusedw[8] <= dcfifo_aal1:auto_generated.wrusedw[8]


|sdr_test|sdfifo_ctrl:uut_sdffifoctrl|wrfifo:uut_wrfifo|dcfifo:dcfifo_component|dcfifo_aal1:auto_generated
data[0] => altsyncram_3j01:fifo_ram.data_a[0]
data[1] => altsyncram_3j01:fifo_ram.data_a[1]
data[2] => altsyncram_3j01:fifo_ram.data_a[2]
data[3] => altsyncram_3j01:fifo_ram.data_a[3]
data[4] => altsyncram_3j01:fifo_ram.data_a[4]
data[5] => altsyncram_3j01:fifo_ram.data_a[5]
data[6] => altsyncram_3j01:fifo_ram.data_a[6]
data[7] => altsyncram_3j01:fifo_ram.data_a[7]
data[8] => altsyncram_3j01:fifo_ram.data_a[8]
data[9] => altsyncram_3j01:fifo_ram.data_a[9]
data[10] => altsyncram_3j01:fifo_ram.data_a[10]
data[11] => altsyncram_3j01:fifo_ram.data_a[11]
data[12] => altsyncram_3j01:fifo_ram.data_a[12]
data[13] => altsyncram_3j01:fifo_ram.data_a[13]
data[14] => altsyncram_3j01:fifo_ram.data_a[14]
data[15] => altsyncram_3j01:fifo_ram.data_a[15]
q[0] <= altsyncram_3j01:fifo_ram.q_b[0]
q[1] <= altsyncram_3j01:fifo_ram.q_b[1]
q[2] <= altsyncram_3j01:fifo_ram.q_b[2]
q[3] <= altsyncram_3j01:fifo_ram.q_b[3]
q[4] <= altsyncram_3j01:fifo_ram.q_b[4]
q[5] <= altsyncram_3j01:fifo_ram.q_b[5]
q[6] <= altsyncram_3j01:fifo_ram.q_b[6]
q[7] <= altsyncram_3j01:fifo_ram.q_b[7]
q[8] <= altsyncram_3j01:fifo_ram.q_b[8]
q[9] <= altsyncram_3j01:fifo_ram.q_b[9]
q[10] <= altsyncram_3j01:fifo_ram.q_b[10]
q[11] <= altsyncram_3j01:fifo_ram.q_b[11]
q[12] <= altsyncram_3j01:fifo_ram.q_b[12]
q[13] <= altsyncram_3j01:fifo_ram.q_b[13]
q[14] <= altsyncram_3j01:fifo_ram.q_b[14]
q[15] <= altsyncram_3j01:fifo_ram.q_b[15]
rdclk => a_graycounter_o96:rdptr_g1p.clock
rdclk => altsyncram_3j01:fifo_ram.clock1
rdclk => _.IN0
rdclk => alt_synch_pipe_fv7:rs_dgwp.clock
rdclk => p0addr.CLK
rdclk => rdptr_g[9].CLK
rdclk => rdptr_g[8].CLK
rdclk => rdptr_g[7].CLK
rdclk => rdptr_g[6].CLK
rdclk => rdptr_g[5].CLK
rdclk => rdptr_g[4].CLK
rdclk => rdptr_g[3].CLK
rdclk => rdptr_g[2].CLK
rdclk => rdptr_g[1].CLK
rdclk => rdptr_g[0].CLK
rdreq => valid_rdreq.IN0
wrclk => a_graycounter_d2c:wrptr_g1p.clock
wrclk => a_graycounter_c2c:wrptr_gp.clock
wrclk => altsyncram_3j01:fifo_ram.clock0
wrclk => dffpipe_909:ws_brp.clock
wrclk => dffpipe_909:ws_bwp.clock
wrclk => alt_synch_pipe_gv7:ws_dgrp.clock
wrclk => delayed_wrptr_g[9].CLK
wrclk => delayed_wrptr_g[8].CLK
wrclk => delayed_wrptr_g[7].CLK
wrclk => delayed_wrptr_g[6].CLK
wrclk => delayed_wrptr_g[5].CLK
wrclk => delayed_wrptr_g[4].CLK
wrclk => delayed_wrptr_g[3].CLK
wrclk => delayed_wrptr_g[2].CLK
wrclk => delayed_wrptr_g[1].CLK
wrclk => delayed_wrptr_g[0].CLK
wrreq => valid_wrreq.IN0
wrusedw[0] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
wrusedw[1] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
wrusedw[2] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
wrusedw[3] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
wrusedw[4] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
wrusedw[5] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
wrusedw[6] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
wrusedw[7] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
wrusedw[8] <= op_1.DB_MAX_OUTPUT_PORT_TYPE


|sdr_test|sdfifo_ctrl:uut_sdffifoctrl|wrfifo:uut_wrfifo|dcfifo:dcfifo_component|dcfifo_aal1:auto_generated|a_gray2bin_kdb:wrptr_g_gray2bin
bin[0] <= xor0.DB_MAX_OUTPUT_PORT_TYPE
bin[1] <= xor1.DB_MAX_OUTPUT_PORT_TYPE
bin[2] <= xor2.DB_MAX_OUTPUT_PORT_TYPE
bin[3] <= xor3.DB_MAX_OUTPUT_PORT_TYPE
bin[4] <= xor4.DB_MAX_OUTPUT_PORT_TYPE
bin[5] <= xor5.DB_MAX_OUTPUT_PORT_TYPE
bin[6] <= xor6.DB_MAX_OUTPUT_PORT_TYPE
bin[7] <= xor7.DB_MAX_OUTPUT_PORT_TYPE
bin[8] <= xor8.DB_MAX_OUTPUT_PORT_TYPE
bin[9] <= gray[9].DB_MAX_OUTPUT_PORT_TYPE
gray[0] => xor0.IN0
gray[1] => xor1.IN0
gray[2] => xor2.IN0
gray[3] => xor3.IN0
gray[4] => xor4.IN0
gray[5] => xor5.IN0
gray[6] => xor6.IN0
gray[7] => xor7.IN0
gray[8] => xor8.IN1
gray[9] => bin[9].DATAIN
gray[9] => xor8.IN0


|sdr_test|sdfifo_ctrl:uut_sdffifoctrl|wrfifo:uut_wrfifo|dcfifo:dcfifo_component|dcfifo_aal1:auto_generated|a_gray2bin_kdb:ws_dgrp_gray2bin
bin[0] <= xor0.DB_MAX_OUTPUT_PORT_TYPE
bin[1] <= xor1.DB_MAX_OUTPUT_PORT_TYPE
bin[2] <= xor2.DB_MAX_OUTPUT_PORT_TYPE
bin[3] <= xor3.DB_MAX_OUTPUT_PORT_TYPE
bin[4] <= xor4.DB_MAX_OUTPUT_PORT_TYPE
bin[5] <= xor5.DB_MAX_OUTPUT_PORT_TYPE
bin[6] <= xor6.DB_MAX_OUTPUT_PORT_TYPE
bin[7] <= xor7.DB_MAX_OUTPUT_PORT_TYPE
bin[8] <= xor8.DB_MAX_OUTPUT_PORT_TYPE
bin[9] <= gray[9].DB_MAX_OUTPUT_PORT_TYPE
gray[0] => xor0.IN0
gray[1] => xor1.IN0
gray[2] => xor2.IN0
gray[3] => xor3.IN0
gray[4] => xor4.IN0
gray[5] => xor5.IN0
gray[6] => xor6.IN0
gray[7] => xor7.IN0
gray[8] => xor8.IN1
gray[9] => bin[9].DATAIN
gray[9] => xor8.IN0


|sdr_test|sdfifo_ctrl:uut_sdffifoctrl|wrfifo:uut_wrfifo|dcfifo:dcfifo_component|dcfifo_aal1:auto_generated|a_graycounter_o96:rdptr_g1p
aclr => counter7a[9].IN0
aclr => counter7a[8].IN0
aclr => counter7a[7].IN0
aclr => counter7a[6].IN0
aclr => counter7a[5].IN0
aclr => counter7a[4].IN0
aclr => counter7a[3].IN0
aclr => counter7a[2].IN0
aclr => counter7a[1].IN0
aclr => counter7a[0].IN0
aclr => parity5.IN0
aclr => sub_parity6a1.IN0
aclr => sub_parity6a0.IN0
clock => counter7a[9].CLK
clock => counter7a[8].CLK
clock => counter7a[7].CLK
clock => counter7a[6].CLK
clock => counter7a[5].CLK
clock => counter7a[4].CLK
clock => counter7a[3].CLK
clock => counter7a[2].CLK
clock => counter7a[1].CLK
clock => counter7a[0].CLK
clock => parity5.CLK
clock => sub_parity6a0.CLK
clock => sub_parity6a1.CLK
clock => sub_parity6a2.CLK
cnt_en => _.IN0
cnt_en => _.IN0
cnt_en => _.IN0
cnt_en => _.IN0
cnt_en => _.IN0
cnt_en => _.IN0
cnt_en => _.IN0
cnt_en => _.IN0
cnt_en => _.IN0
cnt_en => _.IN0
cnt_en => cntr_cout[0].IN0
cnt_en => parity_cout.IN1
q[0] <= counter7a[0].DB_MAX_OUTPUT_PORT_TYPE
q[1] <= counter7a[1].DB_MAX_OUTPUT_PORT_TYPE
q[2] <= counter7a[2].DB_MAX_OUTPUT_PORT_TYPE
q[3] <= counter7a[3].DB_MAX_OUTPUT_PORT_TYPE