This book is about the digital logic design of microprocessors. It is intended to provide both an understanding of the basic principles of digital logic design, and how these fundamental principles are applied in the building of complex microprocessor circuits using current technologies.
上传时间： 2013-10-14
上传用户：leyesome
8.2+LED控制VHDL程序与仿真
上传时间： 2013-11-03
上传用户：我们的船长
NAND FLASH 读写控制以及ECC的VHDL源程序
上传时间： 2013-10-13
上传用户：003030
The C++ Programming Language Special 3rd Edition。 经典C++教材
标签： Programming Language Edition Special
上传时间： 2013-11-20
上传用户：netwolf
VHDL
上传时间： 2013-11-12
上传用户：mqien
FPGA与ARM EPI通信，控制16路步进电机和12路DC马达 VHDL编写的，，，，，
上传时间： 2013-10-31
上传用户：chaisz
中文版详情浏览：http://www.elecfans.com/emb/fpga/20130715324029.html Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture The Xilinx® UltraScale™ architecture delivers unprecedented levels of integration and capability with ASIC-class system- level performance for the most demanding applications. The UltraScale architecture is the industr y's f irst application of leading-edge ASIC architectural enhancements in an All Programmable architecture that scales from 20 nm planar through 16 nm FinFET technologies and beyond, in addition to scaling from monolithic through 3D ICs. Through analytical co-optimization with the X ilinx V ivado® Design Suite, the UltraScale architecture provides massive routing capacity while intelligently resolving typical bottlenecks in ways never before possible. This design synergy achieves greater than 90% utilization with no performance degradation. Some of the UltraScale architecture breakthroughs include: • Strategic placement (virtually anywhere on the die) of ASIC-like system clocks, reducing clock skew by up to 50% • Latency-producing pipelining is virtually unnecessary in systems with massively parallel bus architecture, increasing system speed and capability • Potential timing-closure problems and interconnect bottlenecks are eliminated, even in systems requiring 90% or more resource utilization • 3D IC integration makes it possible to build larger devices one process generation ahead of the current industr y standard • Greatly increased system performance, including multi-gigabit serial transceivers, I/O, and memor y bandwidth is available within even smaller system power budgets • Greatly enhanced DSP and packet handling The Xilinx UltraScale architecture opens up whole new dimensions for designers of ultra-high-capacity solutions.
标签： UltraScale Xilinx 架构
上传时间： 2013-11-21
上传用户：wxqman
vhdl语言 EDA 2实验
上传时间： 2013-11-06
上传用户：bqc1245824354
文中详细介绍了QPSK技术的工作原理和QPSK调制、解调的系统设计方案，并通过VHDL语言编写调制解调程序和QuartusII软件建模对程序进行仿真，通过引脚锁定，下载程序到FPGA芯片EP1K30TC144-3中验证。软件仿真和硬件验证结果表明了该设计的正确性和可行性，由于采用FPGA芯片，减小了硬件设计的复杂性，该设计具有便于移植维护和升级的特点。
上传时间： 2013-10-09
上传用户：stewart·
简单明了的VHDL程序实现24小时计时时钟！
上传时间： 2013-11-02
上传用户：nem567397
