虫虫首页| 资源下载| 资源专辑| 精品软件
登录| 注册

multi-module

  • Wireless+Communication+Circuits+and+Systems

    This book is concerned with integrated circuits and systems for wireless and mobile communications. Circuit techniques and implementation of reconfigurable low-voltage and low-power single-chip CMOS transceivers for multiband and multi- mode universal wireless communications are the focus of the book. Applications encompass both long-range mobile cellular communications (GSM and UMTS) and short-range wireless LANs (IEEE802.11 and Bluetooth). Recent advances in research into transceiver architecture, RF frontend, analogue baseband, RF CAD and automatic testing are reported. 

    标签: Communication Wireless Circuits Systems and

    上传时间: 2020-06-01

    上传用户:shancjb

  • Wireless+Multi-Antenna+Channels+Modeling

    The explosion in demand for wireless services experienced over the past 20 years has put significant pressure on system designers to increase the capacity of the systems being deployed. While the spectral resource is very scarce and practically exhausted, the biggest possibilities are predicted to be in the areas of spectral reuse by unlicensed users or in exploiting the spatial dimension of the wireless channels. The former approach is now under intense development and is known as the cogni- tive radio approach (Haykin 2005). 

    标签: Multi-Antenna Wireless Channels Modeling

    上传时间: 2020-06-01

    上传用户:shancjb

  • Chemical mechanical polishing

    The planarization technology of Chemical-Mechanical-Polishing (CMP), used for the manufacturing of multi- level metal interconnects for high-density Integrated Circuits (IC), is also readily adaptable as an enabling technology in MicroElectroMechanical Systems (MEMS) fabrication, particularly polysilicon surface micromachining. CMP not only eases the design and manufacturability of MEMS devices by eliminating several photolithographic and film issues generated by severe topography, but also enables far greater flexibility with process complexity and associated designs. T

    标签: mechanical polishing Chemical

    上传时间: 2020-06-06

    上传用户:shancjb

  • Power+Electronic+Modules+Design+Manufacture

    A power semiconductor module is basically a power circuit of different materials assembled together using hybrid technology, such as semiconduc- tor chip attachment, wire bonding, encapsulation, etc. The materials involved cover a wide range from insulators, conductors, and semiconduc- tors to organics and inorganics. Since these materials all behave differently under various environmental, electrical, and thermal stresses, proper selec- tion of these materials and the assembly processes are critical. In-depth knowledge of the material properties and the processing techniques is there- fore required to build a high-performance and highly reliable power module.

    标签: Manufacture Electronic Modules Design Power

    上传时间: 2020-06-07

    上传用户:shancjb

  • WBG+Materials+for+Power+Electronics

    stract With  global  drivers  such  as  better  energy consumption, energy efficiency and reduction of greenhouse gases, CO 2 emission reduction has become key in every layer of the value chain. Power Electronics has definitely a role to play in these thrilling challenges. From converters down to compound semiconductors, innovation is leading to breakthrough technologies. Wide BandGap, Power Module Packaging, growth of Electric Vehicle market will game change the overall power electronic industry and supply chain. In this presentation we  will  review  power  electronics  trends,  from technologies to markets.

    标签: Electronics Materials Power WBG for

    上传时间: 2020-06-07

    上传用户:shancjb

  • RFID+and+RFID-Enabled+Sensors

    adio Frequency Identification (RFID) is a rapidly developing automatic wireless data-collection technology with a long history.The first multi-bit functional passive RFID systems,with a range of several meters, appeared in the early 1970s, and continued to evolve through the 1980s. Recently, RFID has experienced a tremendous growth,due to developments in integrated circuits and radios, and due to increased interest from the retail industrial and government.

    标签: RFID-Enabled Sensors RFID and

    上传时间: 2020-06-08

    上传用户:shancjb

  • RFID-WSN+Integrated+Architecture

    Radio frequency identification (RFID) and Wireless sensor networks (WSN) are the two key wireless technologies that have diversified applications in the present and the upcoming systems in this area. RFID is a wireless automated recognition technology which is primarily used to recognize objects or to follow their posi- tion without providing any sign about the physical form of the substance. On the other hand, WSN not only offers information about the state of the substance and environment but also enables multi-hop wireless communications.

    标签: Architecture Integrated RFID-WSN

    上传时间: 2020-06-08

    上传用户:shancjb

  • lm75A温度数字转换器 FPGA读写实验Verilog逻辑源码Quartus工程文件+文档资料

    lm75A温度数字转换器 FPGA读写实验Verilog逻辑源码Quartus工程文件+文档资料,FPGA为CYCLONE4系列中的EP4CE6E22C8. 完整的工程文件,可以做为你的学习设计参考。LM75A 是一个使用了内置带隙温度传感器和模数转换技术的温度数字转换器。它也是一个温度检测器,可提供一个过热检测输出。LM75A 包含许多数据寄存器:配置寄存器用来存储器件的某些配置,如器件的工作模式、OS 工作模式、OS 极性和OS 故障队列等(在功能描述一节中有详细描述);温度寄存器(Temp),用来存储读取的数字温度;设定点寄存器(Tos & Thyst),用来存储可编程的过热关断和滞后限制,器件通过2 线的串行I2C 总线接口与控制器通信。LM75A 还包含一个开漏输出(OS),当温度超过编程限制的值时该输出有效。LM75A 有3 个可选的逻辑地址管脚,使得同一总线上可同时连接8个器件而不发生地址冲突。LM75A 可配置成不同的工作条件。它可设置成在正常工作模式下周期性地对环境温度进行监控或进入关断模式来将器件功耗降至最低。OS 输出有2 种可选的工作模式:OS 比较器模式和OS 中断模式。OS 输出可选择高电平或低电平有效。故障队列和设定点限制可编程,为了激活OS 输出,故障队列定义了许多连续的故障。温度寄存器通常存放着一个11 位的二进制数的补码,用来实现0.125℃的精度。这个高精度在需要精确地测量温度偏移或超出限制范围的应用中非常有用。正常工作模式下,当器件上电时,OS 工作在比较器模式,温度阈值为80℃,滞后75℃,这时,LM75A就可用作一个具有以上预定义温度设定点的独立的温度控制器。module LM75_SEG_LED ( //input input                   sys_clk           ,input                   sys_rst_n         ,inout                   sda_port          ,//output output wire              seg_c1         ,output wire              seg_c2         ,output wire              seg_c3         ,output wire              seg_c4         ,output reg               seg_a          ,output reg               seg_b          ,output reg               seg_c          ,output reg               seg_e          ,output reg               seg_d          ,output reg               seg_f          ,output reg               seg_g          ,output reg               seg_h          ,      output reg              clk_sclk                        );//parameter define parameter WIDTH = 8;parameter SIZE  = 8;//reg define reg    [WIDTH-1:0]       counter             ;reg    [9:0]             counter_div         ;reg                      clk_50k             ;reg                      clk_200k            ;reg                      sda                 ;reg                      enable              ;

    标签: lm75a 数字转换器 fpga verilog

    上传时间: 2021-10-27

    上传用户:

  • FPGA采样AD9238数据并通过VGA波形显示例程 Verilog逻辑源码Quartus工程文件+

    FPGA采样AD9238数据并通过VGA波形显示例程 Verilog逻辑源码Quartus工程文件+文档说明,FPGA型号Cyclone4E系列中的EP4CE6F17C8,Quartus版本17.1。ADC 模块型号为 AN9238,最大采样率 65Mhz,精度为12 位。实验中把 AN9238 的 2 路输入以波形方式在 HDMI 上显示出来,我们可以用更加直观的方式观察波形,是一个数字示波器雏形。module top( input                       clk, input                       rst_n, output                      ad9238_clk_ch0, output                      ad9238_clk_ch1, input[11:0]                 ad9238_data_ch0, input[11:0]                 ad9238_data_ch1, //vga output output                      vga_out_hs, //vga horizontal synchronization output                      vga_out_vs, //vga vertical synchronization output[4:0]                 vga_out_r,  //vga red output[5:0]                 vga_out_g,  //vga green output[4:0]                 vga_out_b   //vga blue);wire                            video_clk;wire                            video_hs;wire                            video_vs;wire                            video_de;wire[7:0]                       video_r;wire[7:0]                       video_g;wire[7:0]                       video_b;wire                            grid_hs;wire                            grid_vs;wire                            grid_de;wire[7:0]                       grid_r;wire[7:0]                       grid_g;wire[7:0]                       grid_b;wire                            wave0_hs;wire                            wave0_vs;wire                            wave0_de;wire[7:0]                       wave0_r;wire[7:0]                       wave0_g;wire[7:0]                       wave0_b;wire                            wave1_hs;wire                            wave1_vs;wire                            wave1_de;wire[7:0]                       wave1_r;wire[7:0]                       wave1_g;wire[7:0]                       wave1_b;wire                            adc_clk;wire                            adc0_buf_wr;wire[10:0]                      adc0_buf_addr;wire[7:0]                       adc0_bu

    标签: fpga ad9238

    上传时间: 2021-10-27

    上传用户:qingfengchizhu

  • FPGA读写SD卡读取BMP图片通过LCD显示例程实验 Verilog逻辑源码Quartus工程文件

    FPGA读写SD卡读取BMP图片通过LCD显示例程实验 Verilog逻辑源码Quartus工程文件+文档说明,FPGA型号Cyclone4E系列中的EP4CE6F17C8,Quartus版本17.1。1 实验简介在前面的实验中我们练习了 SD 卡读写,VGA 视频显示等例程,本实验将 SD 卡里的 BMP 图片读出,写入到外部存储器,再通过 VGA、LCD 等显示。本实验如果通过液晶屏显示,需要有液晶屏模块。2 实验原理在前面的实验中我们在 VGA、LCD 上显示的是彩条,是 FPGA 内部产生的数据,本实验将彩条替换为 SD 内的 BMP 图片数据,但是 SD 卡读取速度远远不能满足显示速度的要求,只能先写入外部高速 RAM,再读出后给视频时序模块显示module top( input                       clk, input                       rst_n, input                       key1, output [5:0]                seg_sel, output [7:0]                seg_data, output                      vga_out_hs,        //vga horizontal synchronization output                      vga_out_vs,        //vga vertical synchronization output[4:0]                 vga_out_r,         //vga red output[5:0]                 vga_out_g,         //vga green output[4:0]                 vga_out_b,         //vga blue output                      sd_ncs,            //SD card chip select (SPI mode) output                      sd_dclk,           //SD card clock output                      sd_mosi,           //SD card controller data output input                       sd_miso,           //SD card controller data input output                      sdram_clk,         //sdram clock output                      sdram_cke,         //sdram clock enable output                      sdram_cs_n,        //sdram chip select output                      sdram_we_n,        //sdram write enable output                      sdram_cas_n,       //sdram column address strobe output                      sdram_ras_n,       //sdram row address strobe output[1:0]                 sdram_dqm,         //sdram data enable output[1:0]                 sdram_ba,          //sdram bank address output[12:0]                sdram_addr,        //sdram address inout[15:0]                 sdram_dq           //sdram data);parameter MEM_DATA_BITS         = 16  ;            //external memory user interface data widthparameter ADDR_BITS             = 24  

    标签: fpga

    上传时间: 2021-10-27

    上传用户: