Verilog_HDL的基本语法详解(夏宇闻版)
Verilog_HDL的基本语法详解(夏宇闻版):Verilog HDL是一种用于数字逻辑电路设计的语言...
Verilog_HDL的基本语法详解(夏宇闻版):Verilog HDL是一种用于数字逻辑电路设计的语言...
Introduction to Xilinx Packaging Electronic packages are interconnectable housings for semiconductor...
The introduction of Spartan-3™ devices has createdmultiple changes in the evolution...
FPGAs have changed dramatically since Xilinx first introduced them just 15 years ago. In ...
WP409利用Xilinx FPGA打造出高端比特精度和周期精度浮点DSP算法实现方案: High-Level Implementation of Bit- and Cycle-Accurat...
UART 4 UART参考设计,Xilinx提供VHDL代码 uart_vhdl This zip file contains the following folders: \...
很多不同的厂家生产各种型号的计算机,它们运行完全不同的操作系统,但TCP.IP协议族允许它们互相进行通信。这一点很让人感到吃惊,因为它的作用已远远超出了起初的设想。T C P / I P起源于6 ...
Abstract: This reference design provides design ideas for a cost-effective, low-power liquid-level...
Abstract: This application note describes system-level characterization and modeling techniques fo...
ALC(Automatic level control自动电平控制)是直放站系统中极为重要的一环,它是指当放大器输出信号电平到达ALC设定值时,增加输入信号电平,放大器对输出信号电平的控制能力。 ...