HSSDRC IP core is the configurable universal SDRAM controller with adaptive bank control and adaptiv
HSSDRC IP core is the configurable universal SDRAM controller with adaptive bank control and adaptiv...
HSSDRC IP core is the configurable universal SDRAM controller with adaptive bank control and adaptiv...
This is is a bridge IP core to interface the Tensilica PIF bus protocol with the OpenCores WishBone....
Library for the 8051 microcontroller. such as math routine, hexBCD, LCD, Keyboard, I2C, Remote, Ke...
A very simple ftp server s source code for demonstration. * It supports PASV/PORT modes and followi...
This C++ code example demonstrates how to localise an application to adapt to the selected phone lan...
This updated C++ example demonstrates how to create multimedia messages using the CMmsClientMtm API....
This C++ example demonstrates how to play (a maximum of 16) simultaneous voices. The example has eig...
Attempt to write voice dictionary: search and play wav files (could be obtained from stardict voice ...
Voice dictionary for mobile - search and play wav files (voice dictionary could be obtained from sta...
Data logger external EEPROM function based on new Renesus microcontroller. This module has been test...