#!/bin/csh ncverilog \ +define+TEST_BENCH \ \ ../verilog/core/alu.v \ ../verilog/core/presclr_wdt.v \…
Run+Level 源代码
汇集 Run+Level 相关的电路原理图、PCB工程文件、单片机/FPGA源代码、数据手册与应用设计方案。
#!/bin/csh -f set PRJDIR = .. set CODEDIR = $PRJDIR/code set INCDIR = $PRJDIR/code set STIMDIR = $PRJDIR/stim set HDLPATH = hdl…
#!/usr/bin/sh java loader.main.LoaderFrame > /dev/null 2>&1 &
sim 2 10000 10 0 0 0 sim 3 10000 10 0 0 0 sim 4 10000 20 10 0 0 sim 5 10000 50 0 10 0 sim 6 10000 50 20 30 0
#!/bin/bash LD_LIBRARY_PATH=/opt/kylix/bin:/opt/jbuilder4/jdk1.3/jre/bin/classic:/opt/jbuilder4/jdk1.3/jre/bin ./URLGrabber
rmmod vnet rm vnet.o make vnet.o insmod vnet.o
#! /bin/bash rm -f snoop.o make rmmod snoop insmod snoop.o
: # # Copyright 1992 by Jutta Degener and Carsten Bormann, Technische # Universitaet Berlin. See the accompanying file "COPYRI…
: # # Copyright 1992 by Jutta Degener and Carsten Bormann, Technische # Universitaet Berlin. See the accompanying file "COPYRIGHT…
unit level; interface uses Windows, Messages, SysUtils, Classes, Graphics, Controls, Forms, Dialogs, ComCtrls, StdCtrl…