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  • PW2053-2.0.pdf规格书

    The PW2053 is a high-efficiency monolithic synchronous buck regulator using a constantfrequency, current mode architecture. The device is available in an adjustable version. Supply currentwith no load is 40uA and drops to <1uA in shutdown. The 2.5V to 5.5V input voltage range makesthe PW2053 ideally suited for single Li-Ion battery powered applications. 100% duty cycle provideslow dropout operation, extending battery life in portable systems. PWM/PFM mode operationprovides very low output ripple voltage for noise sensitive applications. Switching frequency isinternally set at 1.2MHz, allowing the use of small surface mount inductors and capacitors. Lowoutput voltages are easily supported with the 0.6V feedback reference voltage

    标签: pw2053

    上传时间: 2022-02-14

    上传用户:jason_vip1

  • CPCI_E标准规范 CompactPCI® Express Specification

    CPCI_E标准规范 CompactPCI® Express SpecificationThe documents in this section may be useful for reference when reading the specification. The  revision listed for each document is the latest revision at the time this specification was published.  Newer revisions of these documents may exist, so refer to the newest revision. Many of these  documents are referenced throughout this specification. Refer to the newest revision of the  document unless a specific revision is referenced. • PCI Express Base Specification 3.0. PCI Special Interest Group (PCI-SIG). • PCI Express Card Electromechanical (CEM) Specification 3.0. PCI Special Interest Group  (PCI-SIG). • PCI Express to PCI/PCI-X Bridge Specification, Rev. 1.0. PCI Special Interest Group  (PCI-SIG). • PCI Express Jitter White Paper. PCI Special Interest Group (PCI-SIG). • PCIe Rj Dj BER White Paper. PCI Special Interest Group (PCI-SIG). • PHY Electrical Test Specification for PCI Express Architecture. PCI Special Interest Group  (PCI SIG). • System Management Bus (SMBus) Specification, Version 2.0. Smart Battery System  Implementer’

    标签: CPCIE

    上传时间: 2022-02-23

    上传用户:

  • 5G通信技术白皮书技术资料合集

    5G通信技术白皮书技术资料合集摘 要 5G 致力于应对 2020 后多样化差异化业务的巨大挑战,满足超高速率、超低时延、高速移动、高能效 和超高流量与连接数密度等多维能力指标。FuTURE 论坛 5G 特别兴趣组(SIG)围绕着“柔性、绿色、极 速”的 5G 愿景,以“5+2”技术理念,重新思考 5G 网络的设计原则: 1) 香农理论再思考(Rethink Shannon):为无线通信系统开启绿色之旅 2) 蜂窝再思考(Rethink Ring & Young):蜂窝不再(no more cell) 3) 信令控制再思考(Rethink signaling & control):让网络更智能 4) 天线再思考(Rethink antennas):通过 SmarTIle 让基站隐形 5) 频谱空口再思考(Rethink spectrum & air interface):

    标签: 5G通信

    上传时间: 2022-03-06

    上传用户:

  • 电子书-RTL Design Style Guide for Verilog HDL540页

    电子书-RTL Design Style Guide for Verilog HDL540页A FF having a fixed input value is generated from the description in the upper portion of Example 2-21. In this case, ’0’ is output when the reset signal is asynchronously input, and ’1’ is output when the START signal rises. Therefore, the FF data input is fixed at the power supply, since the typical value ’1’ is output following the rise of the START signal. When FF input values are fixed, the fixed inputs become untestable and the fault detection rate drops. When implementing a scan design and converting to a scan FF, the scan may not be executed properl not be executed properly, so such descriptions , so such descriptions are not are not recommended. recommended.[1] As in the lower part of Example 2-21, be sure to construct a synchronous type of circuit and ensure that the clock signal is input to the clock pin of the FF. Other than the sample shown in Example 2-21, there are situations where for certain control signals, those that had been switched due to the conditions of an external input will no longer need to be switched, leaving only a FF. If logic exists in a lower level and a fixed value is input from an upper level, the input value of the FF may also end up being fixed as the result of optimization with logic synthesis tools. In a situation like this, while perhaps difficult to completely eliminate, the problem should be avoided as much as possible.

    标签: RTL verilog hdl

    上传时间: 2022-03-21

    上传用户:canderile

  • 电动汽车永磁无刷直流电机控制器设计

    对某四轮独立驱动电动汽车轮毂电机进行研究,设计一种永磁无刷直流电机控制器.以STM32F103RBT6芯片为基础,对电机驱动电路、采样电路和保护电路分别进行硬件设计与分析;同时,采用模块化软件设计方案,对该控制器的软件系统进行升级.实验验证表明:所设计的电机控制器能使电机响应迅速、转速稳定、无超调,且电动车动力输出性能良好.A permanent magnet brushless direct current motor controller was designed by studying the hub motor of a four-wheel independent drive electric vehicle.Based on STM32 F103RBT6 chip,the hardware design and analysis of motor drive circuit,sampling circuit and protection circuit were carried out respectively.At the same time,modular software design scheme was adopted to upgrade the software system of the controller.Experimental results show that the designed motor controller can ensure the motor fast response,stable speed,no overshoot,and good power output performances.

    标签: 电动汽车 永磁无刷直流电机

    上传时间: 2022-03-26

    上传用户:qingfengchizhu

  • 基于UCC28019的PFC电路设计

    为设计高效率、低损耗的PFC电路,本文基于UCC28019进行电路设计。以UCC28019输出的PWM波形来控制Boost升压斩波为核心电路,使电路中的电容交替地充放电、电感交替的储存和释放能量,最后实现在输入AC20V~24V电压情况下稳定输出DC38V。测试结果表明,系统实现效率为95%左右,电压调整率小于1%,电源功率因数0.99。交流输入电压为19.0-25.8 V时,输出直流电压稳定性较好,电感无明显啸叫且纹波小,具有一定的带负载能力和实用性。In order to design the PFC circuit with high efficiency and low loss,this paper designs the circuit based on UCC28019.The PWM waveform output by UCC28019 is used to control boost chopper as the core circuit,which alternately charges and discharges capacitors,stores and releases energy by inductors,and finally achieves stable output of DC38 V under the input voltage of AC20 V~24 V.The test results show that the system achieves about 95% efficiency,the voltage adjustment rate is less than 1%,the power factor is 0.99,and the AC input voltage is 19.0-25.8 V.The output DC voltage stability is good,the inductance has no obvious whistle and the ripple is small,so it has certain load capacity and practicability.

    标签: ucc28019 pfc 电路设计

    上传时间: 2022-04-03

    上传用户:

  • GL823K 原理图

    The GL823K integrates a high speed 8051 microprocessor and a high efficiency hardware engine for the best data transfer performance between USB and flash card interfaces. Its pin assignment design fits to card sockets to provide easier PCB layout. Inside the chip, it integrates 5V to 3.3V regulator, 3.3V to 1.8V regulator and power MOSFETs and it enables the function of on-chip clock source (OCCS) which means no external 12MHz XTAL is needed and that effectively reduces the total BOM cost.

    标签: GL823K SCH

    上传时间: 2022-04-27

    上传用户:qdxqdxqdxqdx

  • sony CMOS传感器 IMX385LQR-C DataSheet

    DescriptionThe IMX385LQR-C is a diagonal 8.35 mm (Type 1/2) CMOS active pixel type solid-state image sensor with a squarepixel array and 2.13 M effective pixels. This chip operates with analog 3.3 V, digital 1.2 V, and interface 1.8 V triplepower supply, and has low power consumption. High sensitivity, low dark current and no smear are achieved throughthe adoption of R, G and B primary color mosaic filters. This chip features an electronic shutter with variablecharge-integration time.(Applications: Surveillance cameras)

    标签: CMOS传感器 IMX385LQR-C

    上传时间: 2022-06-18

    上传用户:

  • sony CMOS传感器 IMX178LQJ-C dataSheet

    sony CMOS传感器datasheet,IMX178LQJ-C_Data_SheetDescriptionThe IMX178LQJ-C is a diagonal 8.92 mm (Type 1/1.8) CMOS active pixel type image sensor with a square pixelarray and 6.44 M effective pixels. This chip operates with analog 2.9 V, digital 1.2 V and interface 1.8 V triple powersupply, and has low power consumption.High sensitivity, low dark current and no smear are achieved through the adoption of R, G and B primary colormosaic filters.This chip features an electronic shutter with variable charge-integration time.(Applications: Surveillance cameras, FA cameras, Industrial cameras)

    标签: CMOS传感器 IMX178LQJ-C

    上传时间: 2022-06-18

    上传用户:

  • DAC8568驱动程序

    This example shows how you can use signal functions in the Visiondebugger to simulate a signal that is coming into one of the analog inputs of the LPC21xx.The Measure example is described in detail in the Getting StartedUser's Guide.The MEASURE  example program is available for several targets:Simulator: uVision Simulator for LPC2129MCB2100:   Keil MCB2100 evaluation board with ULINK debugger           - Application is loaded to internal Flash.           - Switch S2 (INT1) is used as GPIO and sampled             (jumper positions: J1= off, J7= on)           - potentiometer POT1 is sampled as AIN0             (jumper position: J2= on)           - serial port COM1 parameters: 9600 baud, no parity,             8-bits, 1 stop bit, flow control noneMCB2130:   Keil MCB2130 evaluation board with ULINK debugger           - Application is loaded to internal Flash.           - Switch S2 (INT1) is used as GPIO and sampled             (jumper positions: J1= off, J7= on)           - potentiometer POT1 is sampled as AIN1             (jumper position: J2= on)           - serial port COM1 parameters: 9600 baud, no parity,             8-bits, 1 stop bit, flow control none

    标签: dac8568

    上传时间: 2022-06-28

    上传用户: