设计由555、移位寄存器、D/A转换器、PLD等器件构成的多路序列信号输出和阶梯波输出的发生器电路,重点学习555、D/A转换器及可编程逻辑器件的原理及应用方法。用Proteus软件仿真;实验测试技术指标及功能、绘制信号波形。
上传时间: 2013-11-03
上传用户:crazyer
ad转换器
上传时间: 2014-12-23
上传用户:Bert520
Abstract: Specifications such as noise, effective number of bits (ENOB), effective resolution, and noise-free resolution inlarge part define how accurate an ADC really is. Consequently, understanding the performance metrics related to noise isone of the most difficult aspects of transitioning from a SAR to a delta-sigma ADC. With the current demand for higherresolution, designers must develop a better understanding of ADC noise, ENOB, effective resolution, and signal-to-noiseratio (SNR). This application note helps that understanding.
上传时间: 2013-10-16
上传用户:x18010875091
如果明智地选择时钟,一份简单的抖动规范几乎是不够的。而重要的是,你要知道时钟噪声的带宽和频谱形状,才能在采样过程中适当地将它们考虑进去。很多系统设计师对数据转换器时钟的相位噪声和抖动要求规定得不够高,几皮秒的时钟抖动很快就转换成信号路径上的数分贝损耗。
上传时间: 2014-12-23
上传用户:dreamboy36
CS5361 是CRYSTAL 公司推出的192kHz 采样率、多位( 24 位) 音频
上传时间: 2013-11-07
上传用户:xauthu
放大器选用指导
上传时间: 2013-10-21
上传用户:hwl453472107
越柬越多的应用 例如过程控制、称重等 都需要高分辨率、高集成度和低价格的ADC。 新型Σ .△转换技术恰好可以满足这些要求 然而, 很多设计者对于这种转换技术并不 分了解, 因而更愿意选用传统的逐次比较ADC Σ.A转换器中的模拟部分非常简单(类似j 个Ibit ADC), 而数字部分要复杂得多, 按照功能町划分为数字滤波和抽取单元 由于更接近r 个数字器件,Σ △ADC的制造成本非常低廉.
标签: ADC
上传时间: 2013-10-24
上传用户:han_zh
介绍一种简便的方法, 只用软件就可以将转换器位数提高, 并且还能同时提高采样系统的信噪比。通过实际验证, 证明该方法是成功的。
上传时间: 2013-11-11
上传用户:zhenyushaw
Abstract: This tutorial discusses methods for digitally adjusting the output voltage of a DC-DC converter. The digital adjustmentmethods are with a digital-to-analog converter (DAC), a trim pot (digital potentiometer), and PWM output of a microprocessor.Each method is assessed and several DACs and digital potentiometers presented.
上传时间: 2013-11-20
上传用户:zycidjl
The purpose of this application note is to show an example of how a digital potentiometer can be used in thefeedback loop of a step-up DC-DC converter to provide calibration and/or adjustment of the output voltage.The example circuit uses a MAX5025 step-up DC-DC converter (capable of generating up to 36V,120mWmax) in conjunction with a DS1845, 256 position, NV digital potentiometer. For this example, the desiredoutput voltage is 32V, which is generated from an input supply of 5V. The output voltage can be adjusted in35mV increments (near 32V) and span a range wide enough to account for resistance, potentiometer and DCDCconverter tolerances (27.6V to 36.7V).
上传时间: 2014-12-23
上传用户:781354052