代码搜索:vhdl
找到约 10,000 项符合「vhdl」的源代码
代码结果 10,000
www.eeworm.com/read/168700/9901667
vhdl devider.vhdl
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
-- Uncomment the following lines to use the declarations that are
-- provided for ins
www.eeworm.com/read/363791/9935827
pdf vhdl.pdf
www.eeworm.com/read/164458/10107714
ppt vhdl.ppt
www.eeworm.com/read/162983/10254132
asm _vhdl.asm
www.eeworm.com/read/280569/10313419
vhdl ddsproc.vhdl
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity ddsproc is
Port ( clk, reset: in std_logic; --clk为65536Hz(pow(2,16))
www.eeworm.com/read/280569/10313423
vhdl mux.vhdl
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
-- Uncomment the following lines to use the declarations that are
-- provided for ins
www.eeworm.com/read/280569/10313431
vhdl shift.vhdl
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
-- Uncomment the following lines to use the declarations that are
-- provided for ins
www.eeworm.com/read/280569/10313436
vhdl squaproc.vhdl
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity squaproc is
Port ( clk, reset: in std_logic; --clk为65536Hz(pow(2,16))
www.eeworm.com/read/280569/10313450
vhdl triproc.vhdl
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity triproc is
Port ( clk, reset: in std_logic; --clk为65536Hz(pow(2,16))