代码搜索：testbench
找到约 2,392 项符合「testbench」的源代码
代码结果 2,392
www.eeworm.com/read/423217/10579085
v test.v
//test in the same clk
module testbench1();
reg Clk,Reset;
wire BitWire;
reg [3:0] ClkCounter;
reg in_DataEnable;
reg [7:0] in_Data;
wire [7:0] out_Data;
//connect transmitter and receiver
transm
www.eeworm.com/read/464438/7158453
cpp xsimtestbench_arch.cpp
#include "work/dfgf/testbench_arch.h"
static const char * HSimCopyRightNotice = "Copyright 2004-2005, Xilinx Inc. All rights reserved.";
#include "E:/Program/EDA/Xilinx/vhdl/hdp/ieee/std_logic_1164/
www.eeworm.com/read/493307/6400754
v mt48lc16m16a2_modeltb.v
// Testbench for Micron SDR SDRAM Verilog models
`timescale 1ns / 1ps
module mt48lc16m16a2_modeltb;
reg [15 : 0] dq; // SDRAM I/O
reg [12 : 0] addr
www.eeworm.com/read/406900/11433088
ftm my_mem_vhd.ftm
FMF Timing for testbench Parts
version: | author: | mod date: | changes made:
V1.0 VHD2FTM 03 July 11
www.eeworm.com/read/219674/14870877
vhd bcd2seg_test.vhd
-- VHDL Test Bench Created from source file bcd2seg_display.vhd -- 17:01:26 12/15/2006
--
-- Notes:
-- This testbench has been automatically generated using types std_logic and
-- std_logic_vec
www.eeworm.com/read/17728/754813
vht cpld_mpu1.vht
-- VHDL Test Bench Created from source file CPLD_MPU1.vhd -- 02/17/09 15:28:25
--
-- Notes:
-- 1) This testbench template has been automatically generated using types
-- std_logic and std_logi
www.eeworm.com/read/17937/767649
tf first_0_tb.tf
module testbench();
reg [7:0] data_seq;
integer i;
initial begin
data_seq = 8'b11001111; //testing data
i=0;
begin: search_loop
while(i
www.eeworm.com/read/17937/767668
tf ram16x8d_tb.tf
module testbench();
// Inputs
reg clk;
reg we;
reg [3:0] ADDR;
reg [3:0] DPR_ADDR;
reg [7:0] di;
// Outputs
wire [7:0] SP_OUT;
wire [7:0] DP_OUT;
//
www.eeworm.com/read/32453/1034379
100vhdl+
-- Author : yzf
-- Created On: Thu Dec 21 09:46:16 1995
-- Testbench for comp.comp
library STD;
library WORK;
--library comp;
use STD.STANDARD.ALL;
--use COMP.TYPES.ALL;
use WORK.TYPES.
www.eeworm.com/read/39713/1135092
100vhdl+
-- Author : yzf
-- Created On: Thu Dec 21 09:46:16 1995
-- Testbench for comp.comp
library STD;
library WORK;
--library comp;
use STD.STANDARD.ALL;
--use COMP.TYPES.ALL;
use WORK.TYPES.