代码搜索：testbench
找到约 2,392 项符合「testbench」的源代码
代码结果 2,392
www.eeworm.com/read/314805/13558836
vhw memory_wave.vhw
-- C:\XILINX\BIN\MYCPU16
-- VHDL Test Bench created by
-- HDL Bencher 6.1i
-- Thu Nov 15 13:55:08 2007
--
-- Notes:
-- 1) This testbench has been automatically generated from
-- your Test Be
www.eeworm.com/read/314805/13558889
vhw wave.vhw
-- C:\XILINX\BIN\MYCPU16
-- VHDL Test Bench created by
-- HDL Bencher 6.1i
-- Thu Nov 15 13:56:25 2007
--
-- Notes:
-- 1) This testbench has been automatically generated from
-- your Test Be
www.eeworm.com/read/314805/13558915
vhw alu_wave.vhw
-- C:\XILINX\BIN\MYCPU16
-- VHDL Test Bench created by
-- HDL Bencher 6.1i
-- Thu Nov 15 13:33:14 2007
--
-- Notes:
-- 1) This testbench has been automatically generated from
-- your Test Be
www.eeworm.com/read/314805/13558917
vhw cpu_16_wave.vhw
-- C:\XILINX\BIN\MYCPU16
-- VHDL Test Bench created by
-- HDL Bencher 6.1i
-- Thu Nov 15 12:52:24 2007
--
-- Notes:
-- 1) This testbench has been automatically generated from
-- your Test Be
www.eeworm.com/read/306499/6327697
v a86_tb.v
// http://gforge.openchip.org/projects/a86
`include "timescale.v"
`include "a86_defines.v"
module testbench();
// Inputs
reg rst;
reg clk;
reg debug;
reg [63:0] dbg_cod
www.eeworm.com/read/483119/6609860
tcl run_simili09.tcl
# tcl script for running testbench for fracn09.pl
# Uses Simili, a free VHDL simulator from Symphony EDA
# The command line is "tclsh83 run_simili09.tcl"
# The results are in the file fracn.log
#
# De
www.eeworm.com/read/410844/11267474
vhd dsp_port_test_ss7.vhd
-- VHDL Test Bench Created from source file dsp_port.vhd -- 15:19:22 07/14/2004
--
-- Notes:
-- This testbench has been automatically generated using types std_logic and
-- std_logic_vector for
www.eeworm.com/read/347629/11652717
vhd 63_stim.vhd
-- Author : yzf
-- Created On: Fri Dec 8 09:35:16 1995
-- Testbench for gcd_disp.gcd_disp
--Notice:
--This file has been modified by Wu Qing-ping on Apr 23, 1998.
--Modification: I change a
www.eeworm.com/read/259006/11827474
v t_asic_with_tap.v
module t_ASIC_with_TAP (); // Testbench
parameter size = 4;
parameter BSC_Reg_size = 14;
parameter IR_Reg_size = 3;
parameter N_ASIC_Patterns = 8;
parameter N_TAP_Instruct
www.eeworm.com/read/153614/12020829
vhd 63_stim.vhd
-- Author : yzf
-- Created On: Fri Dec 8 09:35:16 1995
-- Testbench for gcd_disp.gcd_disp
--Notice:
--This file has been modified by Wu Qing-ping on Apr 23, 1998.
--Modification: I change a